JPS56140447A - Logic device - Google Patents

Logic device

Info

Publication number
JPS56140447A
JPS56140447A JP4212580A JP4212580A JPS56140447A JP S56140447 A JPS56140447 A JP S56140447A JP 4212580 A JP4212580 A JP 4212580A JP 4212580 A JP4212580 A JP 4212580A JP S56140447 A JPS56140447 A JP S56140447A
Authority
JP
Japan
Prior art keywords
ffs
gates
circuit
decoder
logic device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4212580A
Other languages
Japanese (ja)
Inventor
Eiji Takahashi
Masahiro Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4212580A priority Critical patent/JPS56140447A/en
Publication of JPS56140447A publication Critical patent/JPS56140447A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To enable to diagnose every circuit part surrounded by FFs in the in- phase transfer circuit, by adding a diagnostic auxiliary circuit to the in-phase transfer circuit of the logic device. CONSTITUTION:The diagnostic auxiliary circuit consisting of address decoder 11, diagnostic mode FF12, OR gates 14 and 15, and clock control gates 18 and 19 is added to the in-phase transfer circuit of the logic device consisting of micro instruction register 1, micro instruction decoder 2, timing control circuit 3, and FFs 5, 6... When the logic device is operating normally, FF12 is 0, and FFs 5 and 6 are operated normally. In the diagnostic mode, FF12 is 1, and mode signal lind 13 becomes 0. Consequently, gates 18 and 19 are controlled by the output signal of decoder 11. Decoder 11 decodes the address field of register 1 and outputs signal ''1'' only to AND gates 18 and 19 for designated specific FFs 5 and 6. Consequently, clock pulses are supplied only to FFs 5 and 6 corresponding to gates 18 and 19, thereby performing diagnosis.
JP4212580A 1980-04-01 1980-04-01 Logic device Pending JPS56140447A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4212580A JPS56140447A (en) 1980-04-01 1980-04-01 Logic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4212580A JPS56140447A (en) 1980-04-01 1980-04-01 Logic device

Publications (1)

Publication Number Publication Date
JPS56140447A true JPS56140447A (en) 1981-11-02

Family

ID=12627213

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4212580A Pending JPS56140447A (en) 1980-04-01 1980-04-01 Logic device

Country Status (1)

Country Link
JP (1) JPS56140447A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0829496A (en) * 1994-07-13 1996-02-02 Nec Corp Semiconductor integrated circuit and method for testing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4957742A (en) * 1972-10-02 1974-06-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4957742A (en) * 1972-10-02 1974-06-05

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0829496A (en) * 1994-07-13 1996-02-02 Nec Corp Semiconductor integrated circuit and method for testing the same

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