JPS56138938A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56138938A
JPS56138938A JP4164980A JP4164980A JPS56138938A JP S56138938 A JPS56138938 A JP S56138938A JP 4164980 A JP4164980 A JP 4164980A JP 4164980 A JP4164980 A JP 4164980A JP S56138938 A JPS56138938 A JP S56138938A
Authority
JP
Japan
Prior art keywords
film
element isolating
isolating region
sio2
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4164980A
Other languages
Japanese (ja)
Inventor
Satoshi Shinozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP4164980A priority Critical patent/JPS56138938A/en
Publication of JPS56138938A publication Critical patent/JPS56138938A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To form an element isolating region of flat and infinitesimal width without heat treatment of high temperature and long time by utilizing a lift-off technique. CONSTITUTION:A silicon oxide film 2 is grown on a P type silicon substrate 1, and a silicon nitride film 3 is accumulated thereon. Then, with a photoresist film as a mask the film 3 is selectively removed, and the film 2 is further overetched. Thereafter, exposed silicon substrate is etched to form a groove 6, and a silicon thermal oxide film 7 is formed on the inner surface thereof. Subsequently, an SiO2 film is accumulated on the whole surface, and an SiO2 film 81 on the film 3 and an SiO2 film 82 in the groove 6 are discontinused and isolated. Then, the film 3 is removed to lift off the film 81, and an element isolating region 9 is formed. Thus, the element isolating region having high flatness can be formed.
JP4164980A 1980-03-31 1980-03-31 Manufacture of semiconductor device Pending JPS56138938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4164980A JPS56138938A (en) 1980-03-31 1980-03-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4164980A JPS56138938A (en) 1980-03-31 1980-03-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56138938A true JPS56138938A (en) 1981-10-29

Family

ID=12614189

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4164980A Pending JPS56138938A (en) 1980-03-31 1980-03-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56138938A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0095328A2 (en) * 1982-05-21 1983-11-30 Kabushiki Kaisha Toshiba Method for manufacturing semiconductor device by controlling thickness of insulating film at peripheral portion of element formation region
US4794437A (en) * 1986-08-11 1988-12-27 General Electric Company ARC gap for integrated circuits

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0095328A2 (en) * 1982-05-21 1983-11-30 Kabushiki Kaisha Toshiba Method for manufacturing semiconductor device by controlling thickness of insulating film at peripheral portion of element formation region
EP0095328B1 (en) * 1982-05-21 1989-09-27 Kabushiki Kaisha Toshiba Method for manufacturing semiconductor device by controlling thickness of insulating film at peripheral portion of element formation region
US4794437A (en) * 1986-08-11 1988-12-27 General Electric Company ARC gap for integrated circuits

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