JPS56137587A - Dynamic type memory circuit - Google Patents
Dynamic type memory circuitInfo
- Publication number
- JPS56137587A JPS56137587A JP4049980A JP4049980A JPS56137587A JP S56137587 A JPS56137587 A JP S56137587A JP 4049980 A JP4049980 A JP 4049980A JP 4049980 A JP4049980 A JP 4049980A JP S56137587 A JPS56137587 A JP S56137587A
- Authority
- JP
- Japan
- Prior art keywords
- readout
- preamplifier
- memory circuit
- type memory
- dynamic type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
Abstract
PURPOSE:To speed up the readout and write-in cycle, by obtaining the readout information from the preamplifier of MISFET. CONSTITUTION:Between the drive MISFETs Q1, Q2 in which each drain is connected to another gate and the sources are commonly connected, and data lines D, -D, the cut MISFETs Q3, Q4 are provided and between Q1, Q2 and the reference potential, the switching MISFET Q5 is provided. Q10, Q11 are respectively provided between Q1, Q2 and readout circuit 2 and Q8, Q9 are provided between Q1, Q2 and readout circuit 3. The preamplifier and input/output circuit are constituted by them. Readout is made from the preamplifier side of Q3, Q4 and write-in information is fed to the data line of Q3, Q4.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4049980A JPS56137587A (en) | 1980-03-31 | 1980-03-31 | Dynamic type memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4049980A JPS56137587A (en) | 1980-03-31 | 1980-03-31 | Dynamic type memory circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56137587A true JPS56137587A (en) | 1981-10-27 |
Family
ID=12582249
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4049980A Pending JPS56137587A (en) | 1980-03-31 | 1980-03-31 | Dynamic type memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56137587A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0175102A2 (en) * | 1984-09-21 | 1986-03-26 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
-
1980
- 1980-03-31 JP JP4049980A patent/JPS56137587A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0175102A2 (en) * | 1984-09-21 | 1986-03-26 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1516817A (en) | Arrangements for performing logical operations | |
JPS5489439A (en) | Data buffer memory of pushup type having variable input area and stationary output area | |
CA935231A (en) | Mos bipolar push-pull output buffer | |
EP0111262A3 (en) | Output multiplexer having one gate delay | |
JPS56137587A (en) | Dynamic type memory circuit | |
JPS5236483A (en) | Semiconductor integrated circuit | |
GB981922A (en) | Data processing apparatus | |
GB981296A (en) | Improvements in or relating to digital registers | |
JPS54148340A (en) | Memory circuit | |
JPS5376719A (en) | Output buffer circuit with tri-state control | |
JPS5528608A (en) | Conference operation system | |
JPS54154964A (en) | Programable counter | |
GB1259237A (en) | ||
JPS56147235A (en) | Carry signal generating circuit | |
JPS56147236A (en) | Adding circuit | |
JPS5235535A (en) | Semiconductor memory | |
JPS57191753A (en) | Register controlling system | |
JPS5627457A (en) | Parity prediction system of shifter | |
JPS5758294A (en) | Sense amplifier circuit | |
JPS5510262A (en) | Data collection controller | |
JPS54157446A (en) | Reading exclusive memory | |
JPS5521662A (en) | Time sharing communication path unit | |
JPS5748834A (en) | Programmable logic array device | |
JPS5282036A (en) | Signal processing of electric charge transfer memory | |
JPS54101227A (en) | Preamplifier for semiconductor memory |