JPS56147235A - Carry signal generating circuit - Google Patents

Carry signal generating circuit

Info

Publication number
JPS56147235A
JPS56147235A JP5078680A JP5078680A JPS56147235A JP S56147235 A JPS56147235 A JP S56147235A JP 5078680 A JP5078680 A JP 5078680A JP 5078680 A JP5078680 A JP 5078680A JP S56147235 A JPS56147235 A JP S56147235A
Authority
JP
Japan
Prior art keywords
switches
turned
output
becomes
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5078680A
Other languages
Japanese (ja)
Inventor
Norishige Tanaka
Yukihiro Saeki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP5078680A priority Critical patent/JPS56147235A/en
Publication of JPS56147235A publication Critical patent/JPS56147235A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)

Abstract

PURPOSE:To simplify the circuit constitution to make the high-speed operation possible, by adding two switches and two inverters to the first and the third logical gates in the carry signal generating circuit using the MOS transistor incorporated in the adding circuit of the sound synthesizing integrated circuit, etc. CONSTITUTION:When inputs Ai and Bi are 0 together, switches S1 and S4 are turned on, and switches S2 and S3 are turned off, and output Si is the same signal as input Ci, and output Ci+1 becomes 0. Meanwhile, when inputs Ai and Bi are 1 either, switches S1 and S4 are turned on, and switches S2 and S3 are turned off, and output Si is the same signal as input Ci, and output Ci+1 becomes 1. When one of inputs Ai and Bi is 1 and the other is 0, switches S1 ans S4 are turned off, and switches S2 and S3 are turned on. Consequently, output Si becomes the inversion signal of input Ci, and output Ci+1 becomes the same signal as input Ci.
JP5078680A 1980-04-17 1980-04-17 Carry signal generating circuit Pending JPS56147235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5078680A JPS56147235A (en) 1980-04-17 1980-04-17 Carry signal generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5078680A JPS56147235A (en) 1980-04-17 1980-04-17 Carry signal generating circuit

Publications (1)

Publication Number Publication Date
JPS56147235A true JPS56147235A (en) 1981-11-16

Family

ID=12868492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5078680A Pending JPS56147235A (en) 1980-04-17 1980-04-17 Carry signal generating circuit

Country Status (1)

Country Link
JP (1) JPS56147235A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0143456A2 (en) * 1983-11-28 1985-06-05 Kabushiki Kaisha Toshiba Parallel adder circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0143456A2 (en) * 1983-11-28 1985-06-05 Kabushiki Kaisha Toshiba Parallel adder circuit

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