JPS5758294A - Sense amplifier circuit - Google Patents
Sense amplifier circuitInfo
- Publication number
- JPS5758294A JPS5758294A JP55132104A JP13210480A JPS5758294A JP S5758294 A JPS5758294 A JP S5758294A JP 55132104 A JP55132104 A JP 55132104A JP 13210480 A JP13210480 A JP 13210480A JP S5758294 A JPS5758294 A JP S5758294A
- Authority
- JP
- Japan
- Prior art keywords
- data
- line
- circuit
- speed
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/067—Single-ended amplifiers
Landscapes
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To establish detected output data in a faster speed than the changing speed of 1 and 0 in an input data with a simple constitution, by combining two sets of P and N types of MISFET's and a delay storage circuit. CONSTITUTION:A circuit A1 in which P channel type MISFETs Q1, Q2 and N channel type MISFETs Q3, Q4 are connected in series is provided, and one end of the Q1 is connected to a positive power supply line V1 and another end of the Q4 is connecte to a power supply line V2 having lower voltage than a positive voltage obtained on the line V1. The connecting middle point B1 of the Q2 and Q3 is connected to the gate of the Q1 and Q4 through a delay storage circuit D1, the gate of the Q2, Q3 is connected and coupled to a data input line L1, and a data output line H1 is led out of the circuit D1. As a result, an output data S5 is detected, amplified and outputted with a speed faster than the changing speed of 0 to 1 and 1 to 0 of an input data S1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55132104A JPS5916353B2 (en) | 1980-09-22 | 1980-09-22 | sense amplifier circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55132104A JPS5916353B2 (en) | 1980-09-22 | 1980-09-22 | sense amplifier circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5758294A true JPS5758294A (en) | 1982-04-07 |
JPS5916353B2 JPS5916353B2 (en) | 1984-04-14 |
Family
ID=15073538
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55132104A Expired JPS5916353B2 (en) | 1980-09-22 | 1980-09-22 | sense amplifier circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5916353B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59231795A (en) * | 1983-06-13 | 1984-12-26 | Mitsubishi Electric Corp | Memory device |
JPS6273486A (en) * | 1985-09-26 | 1987-04-04 | Agency Of Ind Science & Technol | Storage device with semiconductor integrated circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61139364A (en) * | 1984-12-10 | 1986-06-26 | Amayasu Honten:Kk | Production of roasted 'uni' (sea urchin eggs) |
-
1980
- 1980-09-22 JP JP55132104A patent/JPS5916353B2/en not_active Expired
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59231795A (en) * | 1983-06-13 | 1984-12-26 | Mitsubishi Electric Corp | Memory device |
JPH0120519B2 (en) * | 1983-06-13 | 1989-04-17 | Mitsubishi Electric Corp | |
JPS6273486A (en) * | 1985-09-26 | 1987-04-04 | Agency Of Ind Science & Technol | Storage device with semiconductor integrated circuit |
JPH0378716B2 (en) * | 1985-09-26 | 1991-12-16 | Kogyo Gijutsuin |
Also Published As
Publication number | Publication date |
---|---|
JPS5916353B2 (en) | 1984-04-14 |
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