JPS5686545A - Data transmitter - Google Patents

Data transmitter

Info

Publication number
JPS5686545A
JPS5686545A JP16444279A JP16444279A JPS5686545A JP S5686545 A JPS5686545 A JP S5686545A JP 16444279 A JP16444279 A JP 16444279A JP 16444279 A JP16444279 A JP 16444279A JP S5686545 A JPS5686545 A JP S5686545A
Authority
JP
Japan
Prior art keywords
gates
signal
bit
input
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16444279A
Other languages
Japanese (ja)
Inventor
Hirofumi Kira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16444279A priority Critical patent/JPS5686545A/en
Publication of JPS5686545A publication Critical patent/JPS5686545A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing
    • H04L5/24—Arrangements affording multiple use of the transmission path using time-division multiplexing with start-stop synchronous converters
    • H04L5/245—Arrangements affording multiple use of the transmission path using time-division multiplexing with start-stop synchronous converters with a number of discharge tubes or semiconductor elements which successively connect the different channels to the transmission channels

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To enable to transmit the specific bit only for the data in the slot, by providing exclusive OR gates and AND gates and by the operation in the operating mode of bit access. CONSTITUTION:In the operating mode of bit access, a signal of logic ''1'' is given to a terminal 108. The signal of the terminal 108 and the signal of shift register are input to AND gates such each bit. Logic ''1'' is given to the input terminal for the bit to be altered among input terminals 110-115. The signal at the input terminal and the output signal of OR gates are input exclusive OR gates every bit. The output of the exclusive OR gates is input to the shift register 103 with the data load signal from the AND gate 106.
JP16444279A 1979-12-17 1979-12-17 Data transmitter Pending JPS5686545A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16444279A JPS5686545A (en) 1979-12-17 1979-12-17 Data transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16444279A JPS5686545A (en) 1979-12-17 1979-12-17 Data transmitter

Publications (1)

Publication Number Publication Date
JPS5686545A true JPS5686545A (en) 1981-07-14

Family

ID=15793237

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16444279A Pending JPS5686545A (en) 1979-12-17 1979-12-17 Data transmitter

Country Status (1)

Country Link
JP (1) JPS5686545A (en)

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