JPS5627457A - Parity prediction system of shifter - Google Patents

Parity prediction system of shifter

Info

Publication number
JPS5627457A
JPS5627457A JP10279679A JP10279679A JPS5627457A JP S5627457 A JPS5627457 A JP S5627457A JP 10279679 A JP10279679 A JP 10279679A JP 10279679 A JP10279679 A JP 10279679A JP S5627457 A JPS5627457 A JP S5627457A
Authority
JP
Japan
Prior art keywords
bits
data
shift
shifted
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10279679A
Other languages
Japanese (ja)
Other versions
JPS6042497B2 (en
Inventor
Hiroyuki Tsujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54102796A priority Critical patent/JPS6042497B2/en
Publication of JPS5627457A publication Critical patent/JPS5627457A/en
Publication of JPS6042497B2 publication Critical patent/JPS6042497B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To reduce in-use gate circuits by finding exclusive OR of shifted-out SO data in the opposite direction of number N of all bits of shifted data minus number n of bits of the SO data when n is greater than half N.
CONSTITUTION: Input data to be shifted are applied to terminals a0Wa7, and data of assigned shift extent to terminals b4, b2 and b1; and parity data PD is input to terminal P, and information on the shift direction to terminal D respectively. Decoder 11, when shift extent n is not less than four bits, provides shift extent of 8-minus-n bits. As for the data applied to terminals a0Wa7, only shifted-out SO bits are led out of NAND gates 13W20 by the output of decoder 11. When the shift direction is right and the shift extent is not less than four bits, gate 21 is opened. NAND gates 24 and 25 are applied with right and left adjacent shift-in bits S2 and S1 respectively. In a right shift, SO bits are OR-ELSE-ed by EX OR gate 39 and bit S2 and PD are also OR-ELSE-ed, so that the prediction result of the parity of the shifted cata can be obtained.
COPYRIGHT: (C)1981,JPO&Japio
JP54102796A 1979-08-14 1979-08-14 Shifter parity prediction method Expired JPS6042497B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54102796A JPS6042497B2 (en) 1979-08-14 1979-08-14 Shifter parity prediction method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54102796A JPS6042497B2 (en) 1979-08-14 1979-08-14 Shifter parity prediction method

Publications (2)

Publication Number Publication Date
JPS5627457A true JPS5627457A (en) 1981-03-17
JPS6042497B2 JPS6042497B2 (en) 1985-09-24

Family

ID=14337041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54102796A Expired JPS6042497B2 (en) 1979-08-14 1979-08-14 Shifter parity prediction method

Country Status (1)

Country Link
JP (1) JPS6042497B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59141447A (en) * 1983-01-31 1984-08-14 日本セメント株式会社 Accelerator for dry spraying method
JPS62288147A (en) * 1986-06-06 1987-12-15 三井建設株式会社 Concrete flowing method
US4819983A (en) * 1987-09-24 1989-04-11 Asc Incorporated Power latch system
JPH04196657A (en) * 1990-11-26 1992-07-16 Fuji Facom Corp Automatic selective incoming equipment

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59141447A (en) * 1983-01-31 1984-08-14 日本セメント株式会社 Accelerator for dry spraying method
JPS62288147A (en) * 1986-06-06 1987-12-15 三井建設株式会社 Concrete flowing method
US4819983A (en) * 1987-09-24 1989-04-11 Asc Incorporated Power latch system
JPH04196657A (en) * 1990-11-26 1992-07-16 Fuji Facom Corp Automatic selective incoming equipment

Also Published As

Publication number Publication date
JPS6042497B2 (en) 1985-09-24

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