JPS54140438A - Information processor - Google Patents

Information processor

Info

Publication number
JPS54140438A
JPS54140438A JP4769678A JP4769678A JPS54140438A JP S54140438 A JPS54140438 A JP S54140438A JP 4769678 A JP4769678 A JP 4769678A JP 4769678 A JP4769678 A JP 4769678A JP S54140438 A JPS54140438 A JP S54140438A
Authority
JP
Japan
Prior art keywords
switch
numbers
processors
memories
units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4769678A
Other languages
Japanese (ja)
Inventor
Shigeru Koyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4769678A priority Critical patent/JPS54140438A/en
Publication of JPS54140438A publication Critical patent/JPS54140438A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To obtain an information processor which is capable of a highly efficinet switching by setting previously the combination of switches between plural units of processors and shared memories and then decoding the switch register.
CONSTITUTION: The combinations are secured via switch 13 between 8 units of processor 15 and 8 units of shared memory 16, and numbers 0 W 7 are given to these processors and memories each to be displayed in the binary numbers. And switch 17 is installed at the area where the coincidence is secured for both numbers in full bits, along with switch 18 provided at the area where only the lowest bit differs for the numbers between the processors and memories. In the same way, switch 19 and 20 are provided within switch 13 at the areas where the lower 2nd and 3rd bits differ respectively. The data is set to switch register 11 according to the control of central control unit 10, and switches 17 W 20 are opened corresponding to each value of the contents 0 W 3. Thus, different combinations are possible.
COPYRIGHT: (C)1979,JPO&Japio
JP4769678A 1978-04-24 1978-04-24 Information processor Pending JPS54140438A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4769678A JPS54140438A (en) 1978-04-24 1978-04-24 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4769678A JPS54140438A (en) 1978-04-24 1978-04-24 Information processor

Publications (1)

Publication Number Publication Date
JPS54140438A true JPS54140438A (en) 1979-10-31

Family

ID=12782435

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4769678A Pending JPS54140438A (en) 1978-04-24 1978-04-24 Information processor

Country Status (1)

Country Link
JP (1) JPS54140438A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024634A (en) * 1983-07-21 1985-02-07 Matsushita Electric Ind Co Ltd Digital signal processing device
JPH021086A (en) * 1987-11-06 1990-01-05 Oryx Corp Cross bar switch

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024634A (en) * 1983-07-21 1985-02-07 Matsushita Electric Ind Co Ltd Digital signal processing device
JPH021086A (en) * 1987-11-06 1990-01-05 Oryx Corp Cross bar switch

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