JPS56101250A - Data processor - Google Patents

Data processor

Info

Publication number
JPS56101250A
JPS56101250A JP286580A JP286580A JPS56101250A JP S56101250 A JPS56101250 A JP S56101250A JP 286580 A JP286580 A JP 286580A JP 286580 A JP286580 A JP 286580A JP S56101250 A JPS56101250 A JP S56101250A
Authority
JP
Japan
Prior art keywords
memory section
control memory
instruction
control
extended user
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP286580A
Other languages
Japanese (ja)
Other versions
JPS6129022B2 (en
Inventor
Kazutoshi Eguchi
Toshio Iwao
Yutaka Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP286580A priority Critical patent/JPS56101250A/en
Publication of JPS56101250A publication Critical patent/JPS56101250A/en
Publication of JPS6129022B2 publication Critical patent/JPS6129022B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/26Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262Arrangements for next microinstruction selection
    • G06F9/268Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To handle the first control memory section and the second control memory section in the same level, by commonly making the address control to the 1st control memory section consisting of a fixed memory unit and the 2nd control memory section consisting of erasable memories. CONSTITUTION:Taking that the extended user instruction designating the microprogram in the 2nd control memory section 9 is read out from the main memory 1. This extended user instruction is stored in the instruction register 2. The data of instruction code of the extended user instruction stored in the instruction register 2 is given to the 1st control memory section 8 at the micro address via the gate 3, multiplexer 5 and driver 6 in order. Similarly, the data in the instruction code is given to the 2nd control memory section 9 via the gate 3, multiplexers 5, 15 and driver 7 in order. Micro instruction is read out with the micro address.
JP286580A 1980-01-14 1980-01-14 Data processor Granted JPS56101250A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP286580A JPS56101250A (en) 1980-01-14 1980-01-14 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP286580A JPS56101250A (en) 1980-01-14 1980-01-14 Data processor

Publications (2)

Publication Number Publication Date
JPS56101250A true JPS56101250A (en) 1981-08-13
JPS6129022B2 JPS6129022B2 (en) 1986-07-03

Family

ID=11541251

Family Applications (1)

Application Number Title Priority Date Filing Date
JP286580A Granted JPS56101250A (en) 1980-01-14 1980-01-14 Data processor

Country Status (1)

Country Link
JP (1) JPS56101250A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0235523A (en) * 1987-11-03 1990-02-06 Lsi Logic Corp Flexible asic microcomputer
JPH0728640A (en) * 1993-06-24 1995-01-31 Internatl Business Mach Corp <Ibm> Equipment and method for checking instruction operation code

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0235523A (en) * 1987-11-03 1990-02-06 Lsi Logic Corp Flexible asic microcomputer
JPH0728640A (en) * 1993-06-24 1995-01-31 Internatl Business Mach Corp <Ibm> Equipment and method for checking instruction operation code

Also Published As

Publication number Publication date
JPS6129022B2 (en) 1986-07-03

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