JPS57150251A - Code converter - Google Patents

Code converter

Info

Publication number
JPS57150251A
JPS57150251A JP56034890A JP3489081A JPS57150251A JP S57150251 A JPS57150251 A JP S57150251A JP 56034890 A JP56034890 A JP 56034890A JP 3489081 A JP3489081 A JP 3489081A JP S57150251 A JPS57150251 A JP S57150251A
Authority
JP
Japan
Prior art keywords
circuit
bit
code
bits
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56034890A
Other languages
Japanese (ja)
Other versions
JPH0258821B2 (en
Inventor
Katsuhiro Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56034890A priority Critical patent/JPS57150251A/en
Priority to US06/308,244 priority patent/US4447672A/en
Priority to CA000387315A priority patent/CA1181830A/en
Publication of JPS57150251A publication Critical patent/JPS57150251A/en
Publication of JPH0258821B2 publication Critical patent/JPH0258821B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/34Encoding or coding, e.g. Huffman coding or error correction

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To reduce a danger of decoding, by adding an input bit train to a shift register, and an output digit train which consists of integer bits and has been scrambled or descrambled, by an adding circuit which makes 2 its code. CONSTITUTION:At a time (t), an information bit (at) inputted to a combining circuit 1 from an input line 6 is added with a conversion bit (et) by an adding circuit 14 which has made 2 in the circuit 1 its code, and an output signal (bt) is sent out from a line 7. On the other hand, in a bit pattern transducer 2, information stored in shift registers 3-5 is converted to conversion bits (ct)-(et) in accordance with prescribed code patterns (f1)-(f3), respectively. These conversion bits are inputted to the circuit 2, but the bits (ct), (dt) are added with the bit (bt) by an adding circuit 15 and 16 which have made 2 in the circuit 1 its code, and outputs (ft), (gt) are inputted to the shift registers 4, 5, respectively.
JP56034890A 1980-10-06 1981-03-11 Code converter Granted JPS57150251A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP56034890A JPS57150251A (en) 1981-03-11 1981-03-11 Code converter
US06/308,244 US4447672A (en) 1980-10-06 1981-10-02 Device for encrypting each input data bit by at least one keying bit decided by a code pattern and a bit pattern of a predetermined number of preceding encrypted bits
CA000387315A CA1181830A (en) 1980-10-06 1981-10-05 Device for encrypting each input data bit by at least one keying bit decided by a code pattern and a bit pattern of a predetermined number of preceding encrypted bits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56034890A JPS57150251A (en) 1981-03-11 1981-03-11 Code converter

Publications (2)

Publication Number Publication Date
JPS57150251A true JPS57150251A (en) 1982-09-17
JPH0258821B2 JPH0258821B2 (en) 1990-12-10

Family

ID=12426746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56034890A Granted JPS57150251A (en) 1980-10-06 1981-03-11 Code converter

Country Status (1)

Country Link
JP (1) JPS57150251A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072346A (en) * 1983-09-28 1985-04-24 Fujitsu Ltd Self-synchronization type scramble transmission system
JPH03128572A (en) * 1989-07-13 1991-05-31 Sanyo Electric Co Ltd Transmitting and receiving method for facsimile broadcast

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1441767A (en) * 1972-08-23 1976-07-07 Western Electric Co Apparatus for scrambling and apparatus for descrambling binary data
GB1500132A (en) * 1974-03-07 1978-02-08 Standard Telephones Cables Ltd Multi-level data scramblers and descramblers
JPS57111152A (en) * 1980-12-26 1982-07-10 Fujitsu Ltd Encoding device for privacy communication

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1441767A (en) * 1972-08-23 1976-07-07 Western Electric Co Apparatus for scrambling and apparatus for descrambling binary data
GB1500132A (en) * 1974-03-07 1978-02-08 Standard Telephones Cables Ltd Multi-level data scramblers and descramblers
JPS57111152A (en) * 1980-12-26 1982-07-10 Fujitsu Ltd Encoding device for privacy communication

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072346A (en) * 1983-09-28 1985-04-24 Fujitsu Ltd Self-synchronization type scramble transmission system
JPH03128572A (en) * 1989-07-13 1991-05-31 Sanyo Electric Co Ltd Transmitting and receiving method for facsimile broadcast

Also Published As

Publication number Publication date
JPH0258821B2 (en) 1990-12-10

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