JPS56118352A - Preparation of output circuit of integrated circuit - Google Patents
Preparation of output circuit of integrated circuitInfo
- Publication number
- JPS56118352A JPS56118352A JP2142880A JP2142880A JPS56118352A JP S56118352 A JPS56118352 A JP S56118352A JP 2142880 A JP2142880 A JP 2142880A JP 2142880 A JP2142880 A JP 2142880A JP S56118352 A JPS56118352 A JP S56118352A
- Authority
- JP
- Japan
- Prior art keywords
- type
- circuit
- drain
- whose
- output circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005468 ion implantation Methods 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0883—Combination of depletion and enhancement field effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
PURPOSE:To make an IC output circuit one with pull-up resistance type or one with open drain type, by changing only one mask pattern for ions implantation. CONSTITUTION:The MIS transistor Tre on the side of the load, whose drain is connected to the electrode Vcc and whose gate is connected to the source, is connected to the drain of the MIS transistor Trd on the side of the driving, whose drain is connected to the output terminal out and whose gate is connected to the input terminal and whose source is earthed. In the formation of such output circuit, while the program is written by implanting impurities to the channel of the MIS transistor with regard to the mask ROM in the inside circuit Cin, at the same time corresponding to the outside circuit connected to the output terminal out both the Tre and Trd are made to the enhancement type at first, then by ion implantation the Tre can be made to depression type with pull-up resistance or it may be an open drain type without ion implantation. In this manner two kinds of output circuit can be selectively and simply obtained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2142880A JPS56118352A (en) | 1980-02-22 | 1980-02-22 | Preparation of output circuit of integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2142880A JPS56118352A (en) | 1980-02-22 | 1980-02-22 | Preparation of output circuit of integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56118352A true JPS56118352A (en) | 1981-09-17 |
Family
ID=12054712
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2142880A Pending JPS56118352A (en) | 1980-02-22 | 1980-02-22 | Preparation of output circuit of integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56118352A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6315441A (en) * | 1986-07-03 | 1988-01-22 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Integrated circuit device with technical revision pad |
JPS63146460A (en) * | 1986-12-10 | 1988-06-18 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JPH02209764A (en) * | 1988-10-20 | 1990-08-21 | Nec Corp | Microcomputer |
US6163171A (en) * | 1997-01-24 | 2000-12-19 | Nec Corporation | Pull-up and pull-down circuit |
JP2021048435A (en) * | 2019-09-17 | 2021-03-25 | 富士電機株式会社 | State output circuit and power supply device |
-
1980
- 1980-02-22 JP JP2142880A patent/JPS56118352A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6315441A (en) * | 1986-07-03 | 1988-01-22 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Integrated circuit device with technical revision pad |
JPS63146460A (en) * | 1986-12-10 | 1988-06-18 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JPH02209764A (en) * | 1988-10-20 | 1990-08-21 | Nec Corp | Microcomputer |
US6163171A (en) * | 1997-01-24 | 2000-12-19 | Nec Corporation | Pull-up and pull-down circuit |
KR100304675B1 (en) * | 1997-01-24 | 2001-11-02 | 가네꼬 히사시 | Pull up and puu down circuit |
JP2021048435A (en) * | 2019-09-17 | 2021-03-25 | 富士電機株式会社 | State output circuit and power supply device |
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