JPS56107400A - Memory test device - Google Patents
Memory test deviceInfo
- Publication number
- JPS56107400A JPS56107400A JP1079680A JP1079680A JPS56107400A JP S56107400 A JPS56107400 A JP S56107400A JP 1079680 A JP1079680 A JP 1079680A JP 1079680 A JP1079680 A JP 1079680A JP S56107400 A JPS56107400 A JP S56107400A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- address
- information
- block
- defective
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
PURPOSE:To reduce the defective analysis time, by referencing only the memory content of failed memory corresponding to the defect generating blocks, through the concentrated storage of inblock defective at the auxiliary memory, by blocking the memory address to be tested. CONSTITUTION:The memory to be tested 2 is accessed via the address generator 1, the readout information is compared at a theoretical comparator 4 fed with expected pattern, voltage comparator 3, and defective information is written in the failed memory 5. On the other hand, the address information from the delay circuit 6 is block-divided at the blocking circuit 10, and the defect in the address block generated with defects is concentratedly stored in the auxiliary memory 9. Thus, when the information of the memory 9 is read out, whether or not the presence of defects in the address block is discriminated, and when the memory content of the memory 5 corresponding to this block is read out, defect analysis can be made in a short time without reading out all the memory content of the memory 5.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1079680A JPS56107400A (en) | 1980-01-30 | 1980-01-30 | Memory test device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1079680A JPS56107400A (en) | 1980-01-30 | 1980-01-30 | Memory test device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56107400A true JPS56107400A (en) | 1981-08-26 |
Family
ID=11760300
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1079680A Pending JPS56107400A (en) | 1980-01-30 | 1980-01-30 | Memory test device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56107400A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0267976A (en) * | 1988-09-02 | 1990-03-07 | Advantest Corp | Memory testing apparatus |
JP2008186579A (en) * | 2008-03-24 | 2008-08-14 | Advantest Corp | Memory-testing device |
-
1980
- 1980-01-30 JP JP1079680A patent/JPS56107400A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0267976A (en) * | 1988-09-02 | 1990-03-07 | Advantest Corp | Memory testing apparatus |
JP2008186579A (en) * | 2008-03-24 | 2008-08-14 | Advantest Corp | Memory-testing device |
JP4691125B2 (en) * | 2008-03-24 | 2011-06-01 | 株式会社アドバンテスト | Memory test equipment |
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