JPS57205900A - Testing method of memory - Google Patents

Testing method of memory

Info

Publication number
JPS57205900A
JPS57205900A JP56091922A JP9192281A JPS57205900A JP S57205900 A JPS57205900 A JP S57205900A JP 56091922 A JP56091922 A JP 56091922A JP 9192281 A JP9192281 A JP 9192281A JP S57205900 A JPS57205900 A JP S57205900A
Authority
JP
Japan
Prior art keywords
memory
data
register
address
content
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56091922A
Other languages
Japanese (ja)
Other versions
JPS6232827B2 (en
Inventor
Tatsuo Sato
Takashi Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56091922A priority Critical patent/JPS57205900A/en
Publication of JPS57205900A publication Critical patent/JPS57205900A/en
Publication of JPS6232827B2 publication Critical patent/JPS6232827B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices

Abstract

PURPOSE:To perform a memory test under on-line condition with a program having a relatively simple logicality and a small capacity, by writing the data in a memory once, and immediately reproducing data for testing. CONSTITUTION:Data written in an address a1 of a memory are evacuated into a register A and the complement of the ''1'' of the data is planted in the address a1. Then, the exclusive ''or'' of each bit corresponding to the rewritten content of the above mentioned memory[(M)Ix]and the content of the register A are obtained. If a certain memory cell in the address a1 is stuck at ''0'' or ''1'' due to a memory trouble, only the part of a bit corresponding to the troubled cell becomes ''0'' and, even when ''1'' is added to the obtained result, the result does not become ''0'' when the exclusive ''or'' is obtained. When the above mentioned result is ''0'', the data evacuated to the register A are planted in the memory and the content of the memory to be tested is reproduced to the original condition.
JP56091922A 1981-06-15 1981-06-15 Testing method of memory Granted JPS57205900A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56091922A JPS57205900A (en) 1981-06-15 1981-06-15 Testing method of memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56091922A JPS57205900A (en) 1981-06-15 1981-06-15 Testing method of memory

Publications (2)

Publication Number Publication Date
JPS57205900A true JPS57205900A (en) 1982-12-17
JPS6232827B2 JPS6232827B2 (en) 1987-07-16

Family

ID=14040069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56091922A Granted JPS57205900A (en) 1981-06-15 1981-06-15 Testing method of memory

Country Status (1)

Country Link
JP (1) JPS57205900A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59124097A (en) * 1982-12-28 1984-07-18 Toshiba Corp Memory checking method
JPS6219951A (en) * 1985-07-17 1987-01-28 Fujitsu Ltd Semiconductor disk device
JPS647240A (en) * 1987-06-30 1989-01-11 Hioki Electric Works Memory capacity discriminating method for memory card
JP2008016035A (en) * 2006-07-07 2008-01-24 Arm Ltd Memory testing
JP2015176619A (en) * 2014-03-14 2015-10-05 株式会社東芝 semiconductor integrated circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0538612Y2 (en) * 1988-09-29 1993-09-29

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59124097A (en) * 1982-12-28 1984-07-18 Toshiba Corp Memory checking method
JPS6219951A (en) * 1985-07-17 1987-01-28 Fujitsu Ltd Semiconductor disk device
JPS647240A (en) * 1987-06-30 1989-01-11 Hioki Electric Works Memory capacity discriminating method for memory card
JP2008016035A (en) * 2006-07-07 2008-01-24 Arm Ltd Memory testing
JP2015176619A (en) * 2014-03-14 2015-10-05 株式会社東芝 semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS6232827B2 (en) 1987-07-16

Similar Documents

Publication Publication Date Title
CA2219844A1 (en) Method and apparatus for testing multi-port memory
EP0025330A3 (en) Method of rewriting data in a non-volatile memory, and system therefor
EP0149049A3 (en) Data memory with simultaneous write and read
ES487814A1 (en) Multilevel storage hierarchy for a data processing system.
JPS5589980A (en) Semiconductor memory unit
DE3867666D1 (en) CIRCUIT ARRANGEMENT AND METHOD FOR TESTING STORAGE CELLS.
JPS56134390A (en) Rom element
JPS57205900A (en) Testing method of memory
TW347469B (en) Failure analysis memory for memory testing apparatus
KR930003170A (en) Memory circuit test method and semiconductor integrated circuit device
JPS573298A (en) Memory integrated circuit
JPS55163686A (en) Method and device for inspecting memory refresh counter
JPS55163697A (en) Memory device
JPS5744294A (en) Alternating memory control system
JPS5558896A (en) Analyzer for memory defect
JPS5746385A (en) Address discrimination method of semiconductor memory
JPS6446300A (en) Semiconductor memory
JPS5580895A (en) Memory system
JPS56107400A (en) Memory test device
JPS56143057A (en) Failure state detecting system for program instruction
JPS56159747A (en) Program testing device
JPS5769583A (en) Non_volatile semiconductor memory
JPS57189398A (en) Control system for memory system
JPS54104246A (en) Memory system
SU1107126A1 (en) Device for simulating faults