JPS56102161A - Binary encoding circuit - Google Patents
Binary encoding circuitInfo
- Publication number
- JPS56102161A JPS56102161A JP438080A JP438080A JPS56102161A JP S56102161 A JPS56102161 A JP S56102161A JP 438080 A JP438080 A JP 438080A JP 438080 A JP438080 A JP 438080A JP S56102161 A JPS56102161 A JP S56102161A
- Authority
- JP
- Japan
- Prior art keywords
- delayed
- picture
- picture elements
- signal
- variance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/40—Picture signal circuits
- H04N1/403—Discrimination between the two tones in the picture signal of a two-tone original
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Facsimile Image Signal Circuits (AREA)
Abstract
PURPOSE:To make binary encoding possible with high precision and stabilization by using a digital circuit and deciding a suitable threshold while referring pheripheral picture elements. CONSTITUTION:After an input analog picture signal has been converted into a digital picture signal by A/D converter 10, the converted signal is delayed by 1 line with delay element 11a for 1 line delay and successively delayed 2 lines with delay element 11b. These delayed signals are written together with the nondelayed signal in memories 12a-12c which correspond to 2 picture elements respectively. The output of element 11a is written in memory 15 for N picture elements. Average movement and variance are calculated from the concentration values written newly in memories corresponding to respective lines and the results read out after being delayed by 2N picture elements by means of mean value circuit 13 and variance circuit 14 respectively. The concentration value of the picture element to be observed is obtained as the data read out from memory 15 and the data, mean value and variance value are entered comparator 16 to fine binary coded value.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP438080A JPS56102161A (en) | 1980-01-18 | 1980-01-18 | Binary encoding circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP438080A JPS56102161A (en) | 1980-01-18 | 1980-01-18 | Binary encoding circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56102161A true JPS56102161A (en) | 1981-08-15 |
Family
ID=11582744
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP438080A Pending JPS56102161A (en) | 1980-01-18 | 1980-01-18 | Binary encoding circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56102161A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58202666A (en) * | 1982-05-21 | 1983-11-25 | Ricoh Co Ltd | Binary coding system |
JPS6168566U (en) * | 1984-10-12 | 1986-05-10 | ||
EP0220069A2 (en) | 1985-10-18 | 1987-04-29 | Matsushita Graphic Communication Systems, Inc. | Past record correcting/reading apparatus |
-
1980
- 1980-01-18 JP JP438080A patent/JPS56102161A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58202666A (en) * | 1982-05-21 | 1983-11-25 | Ricoh Co Ltd | Binary coding system |
JPS6168566U (en) * | 1984-10-12 | 1986-05-10 | ||
EP0220069A2 (en) | 1985-10-18 | 1987-04-29 | Matsushita Graphic Communication Systems, Inc. | Past record correcting/reading apparatus |
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