JPS5593277A - Semiconductor light transmissiong and receiving device - Google Patents

Semiconductor light transmissiong and receiving device

Info

Publication number
JPS5593277A
JPS5593277A JP49279A JP49279A JPS5593277A JP S5593277 A JPS5593277 A JP S5593277A JP 49279 A JP49279 A JP 49279A JP 49279 A JP49279 A JP 49279A JP S5593277 A JPS5593277 A JP S5593277A
Authority
JP
Japan
Prior art keywords
light
electrode
receiving
sending
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP49279A
Other languages
Japanese (ja)
Inventor
Shigeo Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP49279A priority Critical patent/JPS5593277A/en
Publication of JPS5593277A publication Critical patent/JPS5593277A/en
Pending legal-status Critical Current

Links

Landscapes

  • Led Devices (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

PURPOSE: To attain light transmitting and receivisng device of high efficiency by making light-sending and light-receiving function possible to optimize respectively and independently so that, though light-receiving area is limited, light-sending can be performed throughout the whole area.
CONSTITUTION: On one face of substrate 1 of n-type semiconductor are provided electrodes 2 and 3 separated from each other, while on the other face are laid layers having p+ part 4 and a p- part 5, on both parts of which is provided an electrode 6. With electrode 2 is connected a diode 7. When electrode 8 is earthed and positive voltage is given to electrode 9, layers 4 and 5 emit light. When negative voltage is given to electrode 9, only junction of layers 5 and 1 produces light-receiving mode by the effect of diode 7 and only the incident light to layer 5 is detected. On p+-layer 4 light-emitting of high efficiency occurs, while on p--layer 5 light-receiving of high efficiency takes olace. Moreover, even if high inverse voltage is impressed on p+- layer 4, the breakdown is prevented by diode 7. In this way, light-sending and light-receiving areas can be formed respectively with optimum carrier concentration and both can be made to act with high efficiency as light-sending and light-receiving modes recpectively.
COPYRIGHT: (C)1980,JPO&Japio
JP49279A 1979-01-05 1979-01-05 Semiconductor light transmissiong and receiving device Pending JPS5593277A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49279A JPS5593277A (en) 1979-01-05 1979-01-05 Semiconductor light transmissiong and receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49279A JPS5593277A (en) 1979-01-05 1979-01-05 Semiconductor light transmissiong and receiving device

Publications (1)

Publication Number Publication Date
JPS5593277A true JPS5593277A (en) 1980-07-15

Family

ID=11475248

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49279A Pending JPS5593277A (en) 1979-01-05 1979-01-05 Semiconductor light transmissiong and receiving device

Country Status (1)

Country Link
JP (1) JPS5593277A (en)

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