JPS5593270A - Insulating gate type semiconductor device - Google Patents

Insulating gate type semiconductor device

Info

Publication number
JPS5593270A
JPS5593270A JP150879A JP150879A JPS5593270A JP S5593270 A JPS5593270 A JP S5593270A JP 150879 A JP150879 A JP 150879A JP 150879 A JP150879 A JP 150879A JP S5593270 A JPS5593270 A JP S5593270A
Authority
JP
Japan
Prior art keywords
metal ion
layers
layer
film
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP150879A
Other languages
Japanese (ja)
Inventor
Atsuo Yagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP150879A priority Critical patent/JPS5593270A/en
Publication of JPS5593270A publication Critical patent/JPS5593270A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To obtain IGFET having a small parasitic capacitance and a short channel length, by providing a layer that contains an alkali metal ion on the opposing terminal edges of a source and a drain.
CONSTITUTION: n-Type source drains 12 and 13 are provided on the surface of p-type Si substrate 11 at a distance of d, which is covered with SiO2 film 22. Next, an alkali metal ion like Na is selectively evaporated via a mask to form layer 14 and 15. Further, SiO2 film 23 is laminated to prevent the metal ion from diffusing to the outside. Then electrode 17 is formed, by modifying films 22 and 23 to gate insulating film 16 between layers 14 and 15, and also electrodes 18 and 19 are attached on the layers 12 and 13. In this constitution, the substantial channel length is equivalent to the length of layer 16, which enables therby to fully enlarge the distance d and to increase the operating voltage without causing a punch-through. Also, the gate electrode does not stretch over layers 12 and 13 and the parasitic capacity is small. Accordingly, the switching characteristic can be improved.
COPYRIGHT: (C)1980,JPO&Japio
JP150879A 1979-01-10 1979-01-10 Insulating gate type semiconductor device Pending JPS5593270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP150879A JPS5593270A (en) 1979-01-10 1979-01-10 Insulating gate type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP150879A JPS5593270A (en) 1979-01-10 1979-01-10 Insulating gate type semiconductor device

Publications (1)

Publication Number Publication Date
JPS5593270A true JPS5593270A (en) 1980-07-15

Family

ID=11503413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP150879A Pending JPS5593270A (en) 1979-01-10 1979-01-10 Insulating gate type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5593270A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5869371A (en) * 1995-06-07 1999-02-09 Stmicroelectronics, Inc. Structure and process for reducing the on-resistance of mos-gated power devices

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5869371A (en) * 1995-06-07 1999-02-09 Stmicroelectronics, Inc. Structure and process for reducing the on-resistance of mos-gated power devices
US6046473A (en) * 1995-06-07 2000-04-04 Stmicroelectronics, Inc. Structure and process for reducing the on-resistance of MOS-gated power devices

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