JPS5450273A - Production of mis integrated circuit device - Google Patents
Production of mis integrated circuit deviceInfo
- Publication number
- JPS5450273A JPS5450273A JP11649277A JP11649277A JPS5450273A JP S5450273 A JPS5450273 A JP S5450273A JP 11649277 A JP11649277 A JP 11649277A JP 11649277 A JP11649277 A JP 11649277A JP S5450273 A JPS5450273 A JP S5450273A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- overlap
- power consumption
- constitution
- parasitic capacity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To produce the MIS device of high speed and low power consumption by so foming drain region that its end does not overlap with gate.
CONSTITUTION: After poly-Si 13 is laminated on the gate oxide film 12 of p type Si 11, gate and gate films 13G, 12G are created by photoetching. When source S and drain D are made by diagonally implanting phosphorus ions, D does not overlap with the film 13G. If annealing is done to the extent of not causing spreading of the S, D layers, parasitic capacity CGD becomes smaller. CGS increases but no mirror effect acts upon this and therefore there is of no hindrance. Next, SiO2 14 is deposited and is then opened with windows, where electrodes 15 are formed. Since this constitution reduces the parasitic capacity C, time constant C/gm becomes small, speed increases and the power consumption at the switching transient time decreases
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11649277A JPS6038030B2 (en) | 1977-09-28 | 1977-09-28 | Manufacturing method for MIS integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11649277A JPS6038030B2 (en) | 1977-09-28 | 1977-09-28 | Manufacturing method for MIS integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5450273A true JPS5450273A (en) | 1979-04-20 |
JPS6038030B2 JPS6038030B2 (en) | 1985-08-29 |
Family
ID=14688458
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11649277A Expired JPS6038030B2 (en) | 1977-09-28 | 1977-09-28 | Manufacturing method for MIS integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6038030B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5073514A (en) * | 1989-07-18 | 1991-12-17 | Sony Corporation | Method of manufacturing mis semiconductor device |
-
1977
- 1977-09-28 JP JP11649277A patent/JPS6038030B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5073514A (en) * | 1989-07-18 | 1991-12-17 | Sony Corporation | Method of manufacturing mis semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS6038030B2 (en) | 1985-08-29 |
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