JPS5586157A - Manufacture of semiconductor memory device - Google Patents

Manufacture of semiconductor memory device

Info

Publication number
JPS5586157A
JPS5586157A JP16427678A JP16427678A JPS5586157A JP S5586157 A JPS5586157 A JP S5586157A JP 16427678 A JP16427678 A JP 16427678A JP 16427678 A JP16427678 A JP 16427678A JP S5586157 A JPS5586157 A JP S5586157A
Authority
JP
Japan
Prior art keywords
electrodes
film
polycrystalline
oxide film
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16427678A
Other languages
Japanese (ja)
Inventor
Akira Takei
Takashi Mitsuida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16427678A priority Critical patent/JPS5586157A/en
Publication of JPS5586157A publication Critical patent/JPS5586157A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823406—Combination of charge coupled devices, i.e. CCD, or BBD

Abstract

PURPOSE:To obtain a highly-integrated, two-phase-drive, CCD memory element by using a three-layer electrode structure consisting of polycrystalline Si enveloped by oxide film when a transfer electrode is formed on a semiconductor substrade on which a plurality of barrier regions are provided. CONSTITUTION:Thin SiO2 film 5 is fitted on p<->-type Si substrate 4, on top of this are formed transfer electrodes 1a-1e consisting of a plurality of polycrystalline Si films, and photoresist film masks 6 are provided on these electrodes; and by ion injection, p-type barrier regions 4a are formed in substrate 4 between these electrodes. Next, masks 6 are removed, and oxide film 5 is grown on the entire surface and electrodes 1a-1e are enveloped by this. No.2 electrodes 2b, 2d, 2f of polycrystalline Si are formed on every other depression between these electrodes. Subsequently, film 5 is selectively removed, and a part of the transfer electrodes on both sides of the respective No.2 electrodes is exposed. The entire surface is covered with oxide film 5 again, and this time, No.3 electrodes 3a, 3c, 3e of polycrystalline Si are formed on the depressions on film 5 between No.2 electrodes.
JP16427678A 1978-12-23 1978-12-23 Manufacture of semiconductor memory device Pending JPS5586157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16427678A JPS5586157A (en) 1978-12-23 1978-12-23 Manufacture of semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16427678A JPS5586157A (en) 1978-12-23 1978-12-23 Manufacture of semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS5586157A true JPS5586157A (en) 1980-06-28

Family

ID=15790002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16427678A Pending JPS5586157A (en) 1978-12-23 1978-12-23 Manufacture of semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS5586157A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5019884A (en) * 1989-04-07 1991-05-28 Mitsubishi Denki Kabushiki Kaisha Charge transfer device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5019884A (en) * 1989-04-07 1991-05-28 Mitsubishi Denki Kabushiki Kaisha Charge transfer device

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