JPS54139490A - Semiconductor memory unit - Google Patents
Semiconductor memory unitInfo
- Publication number
- JPS54139490A JPS54139490A JP4652178A JP4652178A JPS54139490A JP S54139490 A JPS54139490 A JP S54139490A JP 4652178 A JP4652178 A JP 4652178A JP 4652178 A JP4652178 A JP 4652178A JP S54139490 A JPS54139490 A JP S54139490A
- Authority
- JP
- Japan
- Prior art keywords
- film
- region
- layer
- resistance
- poly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000013078 crystal Substances 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- 238000005513 bias potential Methods 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 239000012212 insulator Substances 0.000 abstract 1
Landscapes
- Static Random-Access Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE: To secure the optimum resistance value for the load of the memory cell with the memory unit in which the load resistance is connected in series to FET by forming the load resistance with the poly-crystal Si layer via the insulator film and then varying the resistance value according to the bias potential of the semiconductor region.
CONSTITUTION: Thick SiO2 film 2 plus thin SiO2 film 3 enclosed by film 2 are coated on P-type Si substrate 1, and resist film mask 20 is formed on film 2. Then the N-type impurity ion is injected through film 3 exposed at the area where the resistance is to be formed later, and thus shallow N-type region 92c and 92d are formed within substrate 1. After this, poly-crystal Si layer 21 featuring the changing resistance is grown on the entire surface, and film 3e and poly-crystal Si layer 7 are made to remain at the center on region 92c through etching with film 3f and layer 7 left on the entire surface of region 92d. Then N+-type region 92a is formed by diffusion within region 92c exposing across film 3e, and layer 7 is covered with SiO2 film 22 and 23. And PSG film 10 is coated over the entire surface with wirings 12∼14 formed at the fixed areas respectively.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53046521A JPS6034821B2 (en) | 1978-04-21 | 1978-04-21 | semiconductor storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53046521A JPS6034821B2 (en) | 1978-04-21 | 1978-04-21 | semiconductor storage device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54139490A true JPS54139490A (en) | 1979-10-29 |
| JPS6034821B2 JPS6034821B2 (en) | 1985-08-10 |
Family
ID=12749568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53046521A Expired JPS6034821B2 (en) | 1978-04-21 | 1978-04-21 | semiconductor storage device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6034821B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60130161A (en) * | 1983-12-16 | 1985-07-11 | Fujitsu Ltd | Static memory cell |
| JPS62183095A (en) * | 1986-12-24 | 1987-08-11 | Mitsubishi Electric Corp | Semiconductor memory device |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63143060A (en) * | 1986-12-04 | 1988-06-15 | 加藤 善拡 | Endothermic tape |
| JPH0426417Y2 (en) * | 1987-06-05 | 1992-06-25 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5068284A (en) * | 1973-10-17 | 1975-06-07 |
-
1978
- 1978-04-21 JP JP53046521A patent/JPS6034821B2/en not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5068284A (en) * | 1973-10-17 | 1975-06-07 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60130161A (en) * | 1983-12-16 | 1985-07-11 | Fujitsu Ltd | Static memory cell |
| JPS62183095A (en) * | 1986-12-24 | 1987-08-11 | Mitsubishi Electric Corp | Semiconductor memory device |
| JPH0421959B2 (en) * | 1986-12-24 | 1992-04-14 | Mitsubishi Electric Corp |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6034821B2 (en) | 1985-08-10 |
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