JPS5580362A - Vertical junction gate type field effect transistor - Google Patents

Abstract

PURPOSE: To obtain an increased conversion conductance gm without being accompanied by deterioration of the drain-source dielectric strength by positioning a floating gate just beneath the drain and source layers and extending the same to the region just under the gate of in the vicinity of the latter.

CONSTITUTION: An n^--epitaxial layer 12 in which a p⁺-floating gate 19 is empedded is superposed to an n⁺-type source 11, and a p⁺-type gate 13 is formed by a selective opening of an oxide film 23. Then, an oxide film 24 is formed and is selectively opened for the formation of an n⁺-type drain 14. Subsequently, electrodes 18, 16, 17 are formed in layers 11, 13, 14. According to this construction, the dielectric strength between the drain and the floating gate is increased thanks to the presence of the n^--layer between the drain and the floating gate and, accordingly, the dielectric strength between the drain and source is improved. In addition. since the floating gate 19 is spread from the area just beneath the drain to reach the area in the vicinity of the gate 13, a narrow channel is formed to ensure a high conversion conductance gm.

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