JPS5567155A - Preparation of semiconductor device - Google Patents
Preparation of semiconductor deviceInfo
- Publication number
- JPS5567155A JPS5567155A JP13934278A JP13934278A JPS5567155A JP S5567155 A JPS5567155 A JP S5567155A JP 13934278 A JP13934278 A JP 13934278A JP 13934278 A JP13934278 A JP 13934278A JP S5567155 A JPS5567155 A JP S5567155A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- silver
- plating
- plating layer
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3447—Lead-in-hole components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE: To better the soldering properties of an exposed lead of this resin sealing type semiconductor device, by plating an upper portion of a copper plating layer with not less than approximate 3μ thickness with tin or solder.
CONSTITUTION: A semiconductor element is welded to a lead frame plate with silver, connected to a wire and sealed with resin. A lead exposed to the outside is washed with chemicals, and thickness is formed in not less than 3μ by first plating the lead with copper. With the lead 12, there is an oxide film 14 on a surface of a blank 13, there is a silver plating layer 15 on that and a copper plating film 16 and a tin or solder plating layer 17 are successively formed on the surface. When the lead 12 is inserted into a hole of a print substrate 11 and soldered, silver does not liquate out differing from phenomena in conventional devices, and soldering properties are remarkably inproved.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13934278A JPS5567155A (en) | 1978-11-14 | 1978-11-14 | Preparation of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13934278A JPS5567155A (en) | 1978-11-14 | 1978-11-14 | Preparation of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5567155A true JPS5567155A (en) | 1980-05-21 |
Family
ID=15243089
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13934278A Pending JPS5567155A (en) | 1978-11-14 | 1978-11-14 | Preparation of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5567155A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4707724A (en) * | 1984-06-04 | 1987-11-17 | Hitachi, Ltd. | Semiconductor device and method of manufacturing thereof |
-
1978
- 1978-11-14 JP JP13934278A patent/JPS5567155A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4707724A (en) * | 1984-06-04 | 1987-11-17 | Hitachi, Ltd. | Semiconductor device and method of manufacturing thereof |
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