JPS6436055A - Method of sealing electronic component - Google Patents

Method of sealing electronic component

Info

Publication number
JPS6436055A
JPS6436055A JP62190464A JP19046487A JPS6436055A JP S6436055 A JPS6436055 A JP S6436055A JP 62190464 A JP62190464 A JP 62190464A JP 19046487 A JP19046487 A JP 19046487A JP S6436055 A JPS6436055 A JP S6436055A
Authority
JP
Japan
Prior art keywords
printed
printed frame
frame
sealing member
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62190464A
Other languages
Japanese (ja)
Inventor
Yutaka Okuaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62190464A priority Critical patent/JPS6436055A/en
Publication of JPS6436055A publication Critical patent/JPS6436055A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To lower a 'rejecting' phenomenon and to improve filling performance, reliability, and working performance, by solidifying a printed frame which is B-staged beforehand on a printed substrate, and by mounting electronic components inside this printed frame and by leaving metallic thin wires connected and filling the printed frame with a sealing member to unite the printed frame with the sealing member. CONSTITUTION:A printed frame 15 is B-staged on a printed substrate by a method such as silk printing or, stamping, and it is solidified beforehand with resin in a prescribed shape at a normal temperature or at a temperature of 80 deg.C or so. Next a semiconductor element 11 is mounted on a printed substrate 12 inside this printed frame, and metallic wires 14 are used to connect guide electrodes with conductive terminals 13a of conductors 13. Next the printed frame 15 is filled with a sealing member 16 of resin. In this case the printed frame 15 is heated again at 80-150 deg.C to be softened to unite the printed frame 15 with the sealing member 16. Accordingly all corner parts of the peripheral surface of the semiconductor element 11 on the printed frame 15, as well as the sealing member, are filled thoroughly with resin, and so the semiconductor element 11 and the metallic thin wires 14 are sealed to improve filling efficiency.
JP62190464A 1987-07-31 1987-07-31 Method of sealing electronic component Pending JPS6436055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62190464A JPS6436055A (en) 1987-07-31 1987-07-31 Method of sealing electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62190464A JPS6436055A (en) 1987-07-31 1987-07-31 Method of sealing electronic component

Publications (1)

Publication Number Publication Date
JPS6436055A true JPS6436055A (en) 1989-02-07

Family

ID=16258551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62190464A Pending JPS6436055A (en) 1987-07-31 1987-07-31 Method of sealing electronic component

Country Status (1)

Country Link
JP (1) JPS6436055A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6157840U (en) * 1984-09-21 1986-04-18
JP2009200088A (en) * 2008-02-19 2009-09-03 Fuji Electric Device Technology Co Ltd Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6157840U (en) * 1984-09-21 1986-04-18
JP2009200088A (en) * 2008-02-19 2009-09-03 Fuji Electric Device Technology Co Ltd Semiconductor device

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