JPH03198368A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH03198368A JPH03198368A JP33967089A JP33967089A JPH03198368A JP H03198368 A JPH03198368 A JP H03198368A JP 33967089 A JP33967089 A JP 33967089A JP 33967089 A JP33967089 A JP 33967089A JP H03198368 A JPH03198368 A JP H03198368A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- mounting part
- resin
- substrate
- stopper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 11
- 229920005989 resin Polymers 0.000 claims abstract description 10
- 239000011347 resin Substances 0.000 claims abstract description 10
- 238000007789 sealing Methods 0.000 claims abstract description 9
- 239000004033 plastic Substances 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 9
- 239000003822 epoxy resin Substances 0.000 abstract description 5
- 229920000647 polyepoxide Polymers 0.000 abstract description 5
- 239000000853 adhesive Substances 0.000 abstract description 4
- 230000001070 adhesive effect Effects 0.000 abstract description 4
- 239000004593 Epoxy Substances 0.000 abstract description 3
- 239000011521 glass Substances 0.000 abstract description 3
- 230000017525 heat dissipation Effects 0.000 description 4
- 238000000605 extraction Methods 0.000 description 3
- 229920002050 silicone resin Polymers 0.000 description 3
- 239000004840 adhesive resin Substances 0.000 description 2
- 229920006223 adhesive resin Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特にプラスチックビングリ
ッドアレイ型の半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a plastic bin grid array type semiconductor device.
従来の半導体装置は、第３図に示すように、ワイヤーボ
ンディング部２、ざぐり加工により成形された半導体素
子搭載部４を有するＰＷＢ基板１上に半導体素子３を搭
載後、エポキシ樹脂、シリコーン樹脂等の封止樹脂６で
封止され、ストッパービン１０を含むビン９を立て、金
属キャップ７で封止されていた。As shown in FIG. 3, in a conventional semiconductor device, a semiconductor element 3 is mounted on a PWB substrate 1 having a wire bonding part 2 and a semiconductor element mounting part 4 formed by counterbore processing, and then is coated with epoxy resin, silicone resin, etc. A bottle 9 including a stopper bottle 10 was placed upright and sealed with a metal cap 7.
上述した従来の半導体装置は、ガラスエポキシ基板、Ｂ
Ｔレジン基板等のＰＷＢ基板にざぐり加工で成形した半
導体素子搭載部４にＡｇペースト。The conventional semiconductor device described above has a glass epoxy substrate, B
Ag paste is applied to the semiconductor element mounting portion 4 formed by counterbore processing on a PWB board such as a T-resin board.
エポキシ樹脂等の接着剤５により半導体素子３が搭載さ
れ、エポキシ樹脂、シリコーン樹脂等の封止樹脂６で封
止されている。その後、ストッパービン１０を含む外部
導出用ビン９を立て、封止部を覆う様に、金属キャップ
７が樹脂８で接着されている。A semiconductor element 3 is mounted with an adhesive 5 such as epoxy resin, and sealed with a sealing resin 6 such as epoxy resin or silicone resin. Thereafter, the external delivery bottle 9 including the stopper bottle 10 is erected, and the metal cap 7 is bonded with resin 8 so as to cover the sealing portion.
しかし、半導体素子搭載部４がＰＷＢ基板１上に有る為
、放熱効果が悪くハイパワーの半導体素子３を搭載する
ことができなかった。又、外部導出用ビン９を立てる時
、ビン９とストッパー１０とを別々に立てなければなら
ず、２重に工数がかかっていた。However, since the semiconductor element mounting portion 4 is located on the PWB substrate 1, the heat dissipation effect is poor and high power semiconductor elements 3 cannot be mounted thereon. Further, when setting up the external extraction bottle 9, the bottle 9 and the stopper 10 had to be set up separately, which required double man-hours.
本発明の半導体装置は、ＰＷＢ基板上に半導体素子搭載
部が凸状の金属で成形され、かつ、半導体素子搭載部の
裏面がＰＷＢ基板裏面より突出した形状を有している。In the semiconductor device of the present invention, a semiconductor element mounting portion is formed of a convex metal on a PWB substrate, and the back surface of the semiconductor element mounting portion is shaped to protrude from the back surface of the PWB substrate.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の第１の実施例の断面図である。ガラス
エポキシ基板、ＢＴレジン基板等の１．０〜３．０龍厚
のＰＷＢ基板１上にワイヤーボンディング部２を有し、
半導体素子３は銅、アルミニウム、モリブデン等の金属
で凸状に形成され、裏面がＰＷＢ基板裏面より０．５〜
１．０■突出した半導体素子搭載部４上にＡｇペースト
、エポキシ樹脂等の接着剤５により搭載され、エポキシ
樹脂。FIG. 1 is a sectional view of a first embodiment of the invention. A wire bonding portion 2 is provided on a PWB substrate 1 having a thickness of 1.0 to 3.0, such as a glass epoxy substrate or a BT resin substrate,
The semiconductor element 3 is formed of a metal such as copper, aluminum, or molybdenum in a convex shape, and its back surface is 0.5 to 0.5 mm higher than the back surface of the PWB substrate.
1.0 ■ Mounted on the protruding semiconductor element mounting portion 4 with an adhesive 5 such as Ag paste or epoxy resin.
シリコーン樹脂等の封止樹脂６で封止後、封止部を覆う
様に金属キャップ７が接着用樹脂８で接着した後、外部
導出用ビン９をプレス加工により立てて製造される。After sealing with a sealing resin 6 such as a silicone resin, a metal cap 7 is bonded with an adhesive resin 8 so as to cover the sealing portion, and then a bottle 9 for external extraction is erected by press processing.
以上の構造により、放熱効果が大きく又、プリント基板
に実装時、半導体素子搭載部４がストッパーの役目をす
る。The above structure provides a large heat dissipation effect, and the semiconductor element mounting portion 4 serves as a stopper when mounted on a printed circuit board.
第２図は本発明の第２の実施例の断面図である。FIG. 2 is a sectional view of a second embodiment of the invention.
半導体素子搭載部４の裏面に溝を設けることにより放熱
効果はより大きくなる。By providing a groove on the back surface of the semiconductor element mounting portion 4, the heat dissipation effect becomes greater.
以上説明したように、本発明は、半導体素子搭載部を凸
状の金属で成形することにより、ハイパワーの半導体素
子の放熱効果が大きく、又、ＰＷＰ基板裏面より半導体
素子搭載部裏面を突出することによりプリント基板実装
時、ストッパーの役目を行ない、ストッパービンが不要
となる効果がある。As explained above, in the present invention, by forming the semiconductor element mounting part with a convex metal, the heat dissipation effect of high power semiconductor elements is large, and the back surface of the semiconductor element mounting part protrudes from the back surface of the PWP substrate. This serves as a stopper during mounting on a printed circuit board, and has the effect of eliminating the need for a stopper bin.
第１図及び第２図はそれぞれ本発明の第１及び第２の実
施例の断面図、第３図は従来の半導体装置の一例の断面
図である。
１・・・ＰＷＢ基板、２・・・ワイヤーボンディング部
、３・・・半導体素子、４・・・半導体素子搭載部、５
・・・接着剤、６・・・封止樹脂、７・・・金属キャッ
プ、８・・・接着用樹脂、９・・・外部導出用ビン、１
ｏ・・・ストッパービン。1 and 2 are cross-sectional views of first and second embodiments of the present invention, respectively, and FIG. 3 is a cross-sectional view of an example of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... PWB board, 2... Wire bonding part, 3... Semiconductor element, 4... Semiconductor element mounting part, 5
... adhesive, 6 ... sealing resin, 7 ... metal cap, 8 ... adhesive resin, 9 ... bottle for external extraction, 1
o...Stopper bottle.
Claims (1)
部を覆うように金属キャップを樹脂で接着してなるプラ
スチック・ピン・グリッド・アレイ型の半導体装置にお
いて、前記ＰＷＢ基板上の前記半導体素子搭載部が凸状
の金属で形成され、かつ前記半導体素子搭載部の裏面が
前記ＰＷＢ基板裏面より０．５〜１．０ｍｍ突出してい
ることを特徴とする半導体装置。In a plastic pin grid array type semiconductor device in which a semiconductor element is mounted on a PWB substrate, and after resin sealing, a metal cap is bonded with resin to cover the sealing part, the semiconductor element is mounted on the PWB substrate. 1. A semiconductor device, wherein a semiconductor element mounting part is formed of a convex metal, and a back surface of the semiconductor element mounting part protrudes from a back surface of the PWB substrate by 0.5 to 1.0 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33967089A JPH03198368A (en) | 1989-12-26 | 1989-12-26 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33967089A JPH03198368A (en) | 1989-12-26 | 1989-12-26 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03198368A true JPH03198368A (en) | 1991-08-29 |
Family
ID=18329692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33967089A Pending JPH03198368A (en) | 1989-12-26 | 1989-12-26 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03198368A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5642261A (en) * | 1993-12-20 | 1997-06-24 | Sgs-Thomson Microelectronics, Inc. | Ball-grid-array integrated circuit package with solder-connected thermal conductor |
| US5693572A (en) * | 1993-12-20 | 1997-12-02 | Sgs-Thomson Microelectronics, Inc. | Ball grid array integrated circuit package with high thermal conductivity |
| US6940154B2 (en) | 2002-06-24 | 2005-09-06 | Asat Limited | Integrated circuit package and method of manufacturing the integrated circuit package |
-
1989
- 1989-12-26 JP JP33967089A patent/JPH03198368A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5642261A (en) * | 1993-12-20 | 1997-06-24 | Sgs-Thomson Microelectronics, Inc. | Ball-grid-array integrated circuit package with solder-connected thermal conductor |
| US5693572A (en) * | 1993-12-20 | 1997-12-02 | Sgs-Thomson Microelectronics, Inc. | Ball grid array integrated circuit package with high thermal conductivity |
| US5991156A (en) * | 1993-12-20 | 1999-11-23 | Stmicroelectronics, Inc. | Ball grid array integrated circuit package with high thermal conductivity |
| US6940154B2 (en) | 2002-06-24 | 2005-09-06 | Asat Limited | Integrated circuit package and method of manufacturing the integrated circuit package |
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