JP2788011B2 - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JP2788011B2 JP2788011B2 JP1203216A JP20321689A JP2788011B2 JP 2788011 B2 JP2788011 B2 JP 2788011B2 JP 1203216 A JP1203216 A JP 1203216A JP 20321689 A JP20321689 A JP 20321689A JP 2788011 B2 JP2788011 B2 JP 2788011B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- module
- circuit device
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体集積回路モジュールの製造に用い
られる半導体集積回路装置の構造に関するものである。Description: TECHNICAL FIELD The present invention relates to a structure of a semiconductor integrated circuit device used for manufacturing a semiconductor integrated circuit module.
第４図は従来の半導体集積回路モジュールに使用され
る半導体集積回路装置を示す斜視図、第５図は従来の半
導体集積回路モジュールの外形を示す斜視図、第６図は
第５図に示したVI−VI線の断面図である。FIG. 4 is a perspective view showing a semiconductor integrated circuit device used in a conventional semiconductor integrated circuit module, FIG. 5 is a perspective view showing an outer shape of the conventional semiconductor integrated circuit module, and FIG. 6 is shown in FIG. It is sectional drawing of the VI-VI line.
図において、１はリードであり、外部リード1a及びイ
ンナーリード1bとから構成されている。２はパッケージ
封止樹脂、３はモジュール用基板、４はモジュール用封
止樹脂、５は上記外部リード1bをモジュール用基板３に
設けられた電極（図示せず）に接続するための接着剤、
10は半導体集積回路チップ、11はダイパッド、12は金属
細線である。In the figure, reference numeral 1 denotes a lead, which is composed of an external lead 1a and an inner lead 1b. 2 is a package sealing resin, 3 is a module substrate, 4 is a module sealing resin, 5 is an adhesive for connecting the external lead 1b to an electrode (not shown) provided on the module substrate 3,
Reference numeral 10 denotes a semiconductor integrated circuit chip, 11 denotes a die pad, and 12 denotes a thin metal wire.
次に組立動作について説明する。半導体集積回路チッ
プ10はリードフレームに設けられたダイパッド11に接着
され、半導体集積回路チップ10上の電極と外部リード1a
に直結しているインナーリード1bとを金属細線12で接続
する。その後、パッケージ用封止樹脂２で樹脂封止し、
さらに所定の形状に外部リード1aを曲げ加工する。この
ようにして第４図に示される半導体集積回路装置を得
る。Next, the assembling operation will be described. The semiconductor integrated circuit chip 10 is bonded to the die pad 11 provided on the lead frame, and the electrodes on the semiconductor integrated circuit chip 10 and the external leads 1a
Is connected to the inner lead 1b directly connected to the inner lead 1b by a thin metal wire 12. After that, resin sealing is performed with the package sealing resin 2,
Further, the external lead 1a is bent into a predetermined shape. Thus, the semiconductor integrated circuit device shown in FIG. 4 is obtained.
次にモジュール用基板３上に設けられた電極（図示せ
ず）と上記半導体集積回路の外部リード1aとを半田等の
接着材５で接続実装し、さらにこの状態でモジュールと
しての所定の形状にモジュール用封止樹脂４で樹脂成形
することによって第５図に示す半導体集積回路モジュー
ルが完成する。Next, the electrodes (not shown) provided on the module substrate 3 and the external leads 1a of the semiconductor integrated circuit are connected and mounted with an adhesive 5 such as solder, and in this state, a predetermined shape as a module is formed. The semiconductor integrated circuit module shown in FIG. 5 is completed by resin molding with the module sealing resin 4.
従来の半導体集積回路モジュールに使用される半導体
集積回路装置は、以上の様に構成されているので、パッ
ケージ用封止樹脂２とモジュール用封止樹脂４との接着
面積が狭いため、曲げ試験等で剥れる等の問題点があっ
た。Since the semiconductor integrated circuit device used in the conventional semiconductor integrated circuit module is configured as described above, since the bonding area between the package sealing resin 2 and the module sealing resin 4 is small, a bending test or the like is performed. There were problems such as peeling.
この発明は、上記のような従来の問題点を解消するた
めになされたもので、曲げ試験等によりパッケージ用封
止樹脂とモジュール用封止樹脂とが剥れないような半導
体集積回路装置を提供することを目的とする。The present invention has been made in order to solve the conventional problems as described above, and provides a semiconductor integrated circuit device in which a sealing resin for a package and a sealing resin for a module do not peel off by a bending test or the like. The purpose is to do.
この発明に係る半導体集積回路装置は、半導体集積回
路モジュールに使用されるものにおいて、モジュール用
基板との接着面とは反対側のパッケージ封止樹脂面の角
部に、モジュール用樹脂との接着面積を増すための凹部
（切り込み部）を設けたことを特徴とするものである。The semiconductor integrated circuit device according to the present invention is used for a semiconductor integrated circuit module, and has a bonding area with the module resin at a corner of the package sealing resin surface opposite to the bonding surface with the module substrate. A concave portion (cut portion) for increasing the number of holes.
この発明において、半導体集積回路装置の角部に凹部
を設けたことにより、モジュール用封止樹脂との接着面
積が増加し、曲げ試験等による剥れが防止される。In the present invention, since the concave portion is provided at the corner of the semiconductor integrated circuit device, the area of adhesion to the module sealing resin is increased, and peeling due to a bending test or the like is prevented.
以下、この発明の一実施例を図について説明する。第
１図はこの発明の一実施例による半導体集積回路装置を
示す斜視図、第２図は第１図に示した半導体集積回路装
置をモジュール化した半導体集積回路モジュールを示す
斜視図、第３図は第２図のIII−III線断面を示した断面
図である。An embodiment of the present invention will be described below with reference to the drawings. 1 is a perspective view showing a semiconductor integrated circuit device according to an embodiment of the present invention, FIG. 2 is a perspective view showing a semiconductor integrated circuit module obtained by modularizing the semiconductor integrated circuit device shown in FIG. 1, and FIG. FIG. 3 is a sectional view showing a section taken along line III-III of FIG.
図において、６は半導体集積回路装置のうちモジュー
ル用基板３に近接する面とは反対側の面の４つの角部に
設けられた凹部（切り込み部）である。その他の部材は
従来の構成（第４図〜第６図）と同様であるので説明を
省略する。In the figure, reference numeral 6 denotes concave portions (cut portions) provided at four corners of a surface of the semiconductor integrated circuit device opposite to the surface close to the module substrate 3. The other members are the same as those of the conventional configuration (FIGS. 4 to 6), and thus the description is omitted.
上記実施例において、半導体集積回路装置のモジュー
ル用基板取付部とは反対面の角部に凹部６を設けること
により、モジュール用封止樹脂４で封止された際、第２
図，第３図に示すごとく、従来装置よりも多くの面積で
パッケージ用封止樹脂２とモジュール用封止樹脂４とが
接着されるようになる。そのため、曲げ試験等での剥れ
る等の問題点を解消することが出来る。In the above embodiment, by providing the concave portion 6 at the corner opposite to the module substrate mounting portion of the semiconductor integrated circuit device, when the module is sealed with the module sealing resin 4, the second
As shown in FIG. 3 and FIG. 3, the package sealing resin 2 and the module sealing resin 4 are bonded to each other in a larger area than the conventional device. Therefore, problems such as peeling in a bending test or the like can be solved.
以上のようにこの発明によれば、半導体集積回路の基
板への接着面とは反対面の四つの角部に凹部を設けたの
で、曲げ試験等でのモジュール用封止樹脂とパッケージ
用封止樹脂との剥れを防止することが出来る。As described above, according to the present invention, the concave portions are provided at the four corners opposite to the bonding surface of the semiconductor integrated circuit to the substrate, so that the module sealing resin and the package sealing in a bending test and the like are provided. Peeling from the resin can be prevented.
第１図はこの発明の一実施例による半導体集積回路装置
の斜視図、第２図は第１図に示す半導体集積回路装置を
モジュール化した半導体集積回路モジュールを示す斜視
図、第３図は第２図のIII−III線断面を示した断面図、
第４図は従来の半導体集積回路装置を示す斜視図、第５
図は従来の半導体集積回路モジュールを示す斜視図、第
６図は第５図VI−VI線断面図を示す。 図中、１はリード、1aは外部リード、1bはインナーリー
ド、２はパッケージ封止樹脂、３はモジュール用基板、
４はモジュール用封止樹脂、５は接着材、６は凹部、10
は半導体集積回路チップ、11はダイパッド、12は金属細
線である。 なお、図中同一符号は同一又は相当部分を示す。FIG. 1 is a perspective view of a semiconductor integrated circuit device according to an embodiment of the present invention, FIG. 2 is a perspective view showing a semiconductor integrated circuit module obtained by modularizing the semiconductor integrated circuit device shown in FIG. 1, and FIG. FIG. 2 is a sectional view showing a section taken along line III-III of FIG.
FIG. 4 is a perspective view showing a conventional semiconductor integrated circuit device, and FIG.
FIG. 1 is a perspective view showing a conventional semiconductor integrated circuit module, and FIG. 6 is a sectional view taken along line VI-VI of FIG. In the figure, 1 is a lead, 1a is an external lead, 1b is an inner lead, 2 is a package sealing resin, 3 is a module substrate,
4 is a module sealing resin, 5 is an adhesive, 6 is a recess, 10
Denotes a semiconductor integrated circuit chip, 11 denotes a die pad, and 12 denotes a thin metal wire. In the drawings, the same reference numerals indicate the same or corresponding parts.
Claims (1)
体集積回路装置において、モジュール用基板の接着面と
は反対側のパッケージ封止樹脂面の角部に、モジュール
用樹脂との接着面積を増すための凹部を設けたことを特
徴とする半導体集積回路装置。In a semiconductor integrated circuit device used for a semiconductor integrated circuit module, a corner portion of a package sealing resin surface opposite to a bonding surface of a module substrate is provided with an area for increasing a bonding area with the module resin. A semiconductor integrated circuit device having a recess.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1203216A JP2788011B2 (en) | 1989-08-03 | 1989-08-03 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1203216A JP2788011B2 (en) | 1989-08-03 | 1989-08-03 | Semiconductor integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0366150A JPH0366150A (en) | 1991-03-20 |
| JP2788011B2 true JP2788011B2 (en) | 1998-08-20 |
Family
ID=16470388
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1203216A Expired - Lifetime JP2788011B2 (en) | 1989-08-03 | 1989-08-03 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2788011B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2747634B2 (en) * | 1992-10-09 | 1998-05-06 | ローム株式会社 | Surface mount type diode |
| JP3435271B2 (en) * | 1995-11-30 | 2003-08-11 | 三菱電機株式会社 | Semiconductor device |
| JP2002062586A (en) | 2000-08-17 | 2002-02-28 | Iwasaki Electric Co Ltd | Short arc discharge lamp with reflecting mirror |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0680748B2 (en) * | 1986-03-31 | 1994-10-12 | 株式会社東芝 | Resin-sealed semiconductor device |
| JPS63107152A (en) * | 1986-10-24 | 1988-05-12 | Hitachi Ltd | Resin packaged type electronic paris |
| JPH01139443U (en) * | 1988-03-18 | 1989-09-22 |
-
1989
- 1989-08-03 JP JP1203216A patent/JP2788011B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0366150A (en) | 1991-03-20 |
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