JPS5563874A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5563874A
JPS5563874A JP13703178A JP13703178A JPS5563874A JP S5563874 A JPS5563874 A JP S5563874A JP 13703178 A JP13703178 A JP 13703178A JP 13703178 A JP13703178 A JP 13703178A JP S5563874 A JPS5563874 A JP S5563874A
Authority
JP
Japan
Prior art keywords
layer
junction
layers
insulating film
buffer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13703178A
Other languages
Japanese (ja)
Inventor
Tsuneo Morita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13703178A priority Critical patent/JPS5563874A/en
Publication of JPS5563874A publication Critical patent/JPS5563874A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements

Abstract

PURPOSE:To prevent the surge breakdown of an MOS-type large scale integrated circuit, by providing the output part of an MOS-type output buffer circuit with a junction of smaller depth than another junction of the buffer circuit. CONSTITUTION:An MOS transistor, which comprises N<+>-layers (source and drain) 22, 23 in a P substrate 21, a gate electrode 25 on a gate insulating film 24 and electrode wirings 26, 28 coupled to the N<+>-layers 22, 23 through contact holes of an insulating film 27, is provided as one member of an output buffer circuit. An N<+>- layer 29 produced by diffusion in a part off a field insulating film 30 and having a much smaller junction depth Xj than the N<+>-layers 22, 23 is coupled to an output line 32 through a wiring layer 31 located in contact with the N<+>-layer 29. One end of the line 32 is connected to the wiring 28 and the other end is connected to a bonding pad. As a result, a surge voltage will break down a junction consisting of a P- layer 21 and the N<+>-layer 29 and be conducted to the substrate 21. The MOS transistor is thus protected from surge breakdown.
JP13703178A 1978-11-07 1978-11-07 Semiconductor device Pending JPS5563874A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13703178A JPS5563874A (en) 1978-11-07 1978-11-07 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13703178A JPS5563874A (en) 1978-11-07 1978-11-07 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5563874A true JPS5563874A (en) 1980-05-14

Family

ID=15189221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13703178A Pending JPS5563874A (en) 1978-11-07 1978-11-07 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5563874A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868137A (en) * 1987-12-29 1989-09-19 Nec Corporation Method of making insulated-gate field effect transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868137A (en) * 1987-12-29 1989-09-19 Nec Corporation Method of making insulated-gate field effect transistor

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