JPS5550743A - Level shift circuit - Google Patents

Level shift circuit

Info

Publication number
JPS5550743A
JPS5550743A JP12480778A JP12480778A JPS5550743A JP S5550743 A JPS5550743 A JP S5550743A JP 12480778 A JP12480778 A JP 12480778A JP 12480778 A JP12480778 A JP 12480778A JP S5550743 A JPS5550743 A JP S5550743A
Authority
JP
Japan
Prior art keywords
circuit
trq1
source
diode
level shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12480778A
Other languages
Japanese (ja)
Inventor
Katsuhiko Suyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12480778A priority Critical patent/JPS5550743A/en
Publication of JPS5550743A publication Critical patent/JPS5550743A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To save the area required for the circuit and to increase the circuit integrartion, by performing shift function without using diode only with series connection of FET and constant current source. CONSTITUTION:In the source follower circuit, the saturation drain current of constant current source TrQ2 is set so that the current flowing to the transistor TrQ1 is ID1. This set can freely be achieved with the adjustment of the gate width, active layer thickness or impurity concentration. Further, ID1 is greater than the drain saturation current IDSS of TrQ1. Thus, since the source potential of TrQ1 is always lower than the gate potential by VG1, the output from the output terminal X can be level-shifted by VG1. Further, since no level shift diode is used, when it is constituted as the integrated circuit device, the size is small and the circuit integration can be increased.
JP12480778A 1978-10-11 1978-10-11 Level shift circuit Pending JPS5550743A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12480778A JPS5550743A (en) 1978-10-11 1978-10-11 Level shift circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12480778A JPS5550743A (en) 1978-10-11 1978-10-11 Level shift circuit

Publications (1)

Publication Number Publication Date
JPS5550743A true JPS5550743A (en) 1980-04-12

Family

ID=14894599

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12480778A Pending JPS5550743A (en) 1978-10-11 1978-10-11 Level shift circuit

Country Status (1)

Country Link
JP (1) JPS5550743A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5910014A (en) * 1982-07-09 1984-01-19 Hitachi Ltd Mos gain control circuit
EP0356986A2 (en) * 1988-08-30 1990-03-07 Fujitsu Limited Buffer circuit for logic level conversion
JPH03278645A (en) * 1990-03-27 1991-12-10 Nec Corp Dc compensation circuit
JPH04278717A (en) * 1991-03-07 1992-10-05 Nec Corp Differential circuit
JPH057150A (en) * 1991-08-26 1993-01-14 Toshiba Corp Level shift circuit
JPH08195671A (en) * 1995-01-18 1996-07-30 Nec Corp Semiconductor integrated circuit
EP1014585A3 (en) * 1998-12-15 2001-12-19 Nec Corporation Level-shifting circuit and input and output circuits using the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5910014A (en) * 1982-07-09 1984-01-19 Hitachi Ltd Mos gain control circuit
EP0356986A2 (en) * 1988-08-30 1990-03-07 Fujitsu Limited Buffer circuit for logic level conversion
US5051626A (en) * 1988-08-30 1991-09-24 Fujitsu Limited Buffer circuit for logic level conversion
JPH03278645A (en) * 1990-03-27 1991-12-10 Nec Corp Dc compensation circuit
JPH04278717A (en) * 1991-03-07 1992-10-05 Nec Corp Differential circuit
JPH057150A (en) * 1991-08-26 1993-01-14 Toshiba Corp Level shift circuit
JPH08195671A (en) * 1995-01-18 1996-07-30 Nec Corp Semiconductor integrated circuit
EP1014585A3 (en) * 1998-12-15 2001-12-19 Nec Corporation Level-shifting circuit and input and output circuits using the same

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