JPS554735A - Semiconductor memory - Google Patents
Semiconductor memoryInfo
- Publication number
- JPS554735A JPS554735A JP7628778A JP7628778A JPS554735A JP S554735 A JPS554735 A JP S554735A JP 7628778 A JP7628778 A JP 7628778A JP 7628778 A JP7628778 A JP 7628778A JP S554735 A JPS554735 A JP S554735A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- circuits
- supplied
- chip
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
Landscapes
- Static Random-Access Memory (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To make it possible to obtain timing pulses such as precharging clock signals required for the memory circuit operation in a chip by providing a specific disagreement circuit in the memory chip. CONSTITUTION:Address inputs A0, A1, A2... are supplied to not only one input ends of exclusive OR circuits 400, 401, 402,... directly but also the other input ends of circuits 400, 401, 402,... through delay circuits 410, 411, 412,.... Then, inversion signal anti-CS of chip select signal CS not only is supplied to one inversion input end of AND circuit 42 directly but also becomes one input of NOR circuit 44 through delay circuit 43. Outputs of circuits 400, 401, 402,... become inputs of circuit 44, and the output of circuit 44 is supplied to the other inversion input side of circuit 42. Then, output clock pulse phi of circuit 42 is inverted and becomes anti-phi. This circuit is provided in a memory chip which is operated by supplying pulses from the external.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53076287A JPS6019600B2 (en) | 1978-06-23 | 1978-06-23 | semiconductor memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53076287A JPS6019600B2 (en) | 1978-06-23 | 1978-06-23 | semiconductor memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS554735A true JPS554735A (en) | 1980-01-14 |
JPS6019600B2 JPS6019600B2 (en) | 1985-05-16 |
Family
ID=13601097
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53076287A Expired JPS6019600B2 (en) | 1978-06-23 | 1978-06-23 | semiconductor memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6019600B2 (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55138128A (en) * | 1979-04-17 | 1980-10-28 | Nec Corp | Memory circuit |
JPS5774884A (en) * | 1980-06-30 | 1982-05-11 | Inmos Corp | Static ram |
US4337525A (en) * | 1979-04-17 | 1982-06-29 | Nippon Electric Co., Ltd. | Asynchronous circuit responsive to changes in logic level |
JPS62170097A (en) * | 1986-01-21 | 1987-07-27 | Fujitsu Ltd | Semiconductor storage device |
JPS6387692A (en) * | 1987-03-20 | 1988-04-18 | Toshiba Corp | Semiconductor memory |
US4744063A (en) * | 1983-05-31 | 1988-05-10 | Kabushiki Kaisha Toshiba | Static memory utilizing transition detectors to reduce power consumption |
JPS63200390A (en) * | 1987-12-25 | 1988-08-18 | Toshiba Corp | Semiconductor memory |
JPH0378192A (en) * | 1989-08-21 | 1991-04-03 | Fujitsu Ltd | Semiconductor memory |
-
1978
- 1978-06-23 JP JP53076287A patent/JPS6019600B2/en not_active Expired
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55138128A (en) * | 1979-04-17 | 1980-10-28 | Nec Corp | Memory circuit |
US4337525A (en) * | 1979-04-17 | 1982-06-29 | Nippon Electric Co., Ltd. | Asynchronous circuit responsive to changes in logic level |
JPS6256598B2 (en) * | 1979-04-17 | 1987-11-26 | Nippon Electric Co | |
JPS5774884A (en) * | 1980-06-30 | 1982-05-11 | Inmos Corp | Static ram |
JPS631677B2 (en) * | 1980-06-30 | 1988-01-13 | Inmos Corp | |
US4744063A (en) * | 1983-05-31 | 1988-05-10 | Kabushiki Kaisha Toshiba | Static memory utilizing transition detectors to reduce power consumption |
JPS62170097A (en) * | 1986-01-21 | 1987-07-27 | Fujitsu Ltd | Semiconductor storage device |
JPS6387692A (en) * | 1987-03-20 | 1988-04-18 | Toshiba Corp | Semiconductor memory |
JPH034992B2 (en) * | 1987-03-20 | 1991-01-24 | Tokyo Shibaura Electric Co | |
JPS63200390A (en) * | 1987-12-25 | 1988-08-18 | Toshiba Corp | Semiconductor memory |
JPH034993B2 (en) * | 1987-12-25 | 1991-01-24 | Tokyo Shibaura Electric Co | |
JPH0378192A (en) * | 1989-08-21 | 1991-04-03 | Fujitsu Ltd | Semiconductor memory |
Also Published As
Publication number | Publication date |
---|---|
JPS6019600B2 (en) | 1985-05-16 |
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