JPS5538668A - Memory unit - Google Patents
Memory unitInfo
- Publication number
- JPS5538668A JPS5538668A JP11126978A JP11126978A JPS5538668A JP S5538668 A JPS5538668 A JP S5538668A JP 11126978 A JP11126978 A JP 11126978A JP 11126978 A JP11126978 A JP 11126978A JP S5538668 A JPS5538668 A JP S5538668A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- read
- write
- register
- memory unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
Abstract
PURPOSE:To enable a memory unit, incapable of simultaneous write-read operation to provide the simultaneous write and read operations by controlling write-read access and latching operation for read signals by a timing signal corresponding to clocks. CONSTITUTION:When the output of timing generating circuit 28 is made high in level by a clock signal, memory contents corresponding to a read address of memory circuit 22 are read out by attaining access by read register 25 through change-over circuit 26 and supplied to read register 24 through latch circuit 23 put in a through state by the high-level output of circuit 28. When the output of circuit 28 is inverted at the halfway point of this clock signal, circuit 26 selects write address register 27 and put it in a latch state with circuit 23, so that data from write data register 21 will be written in circuit 22. By the next clock, the same operation is repeated and substantially-simultaneous write-read operation can be attained by using a memory unit which can not perform simultaneous write-read operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11126978A JPS5538668A (en) | 1978-09-12 | 1978-09-12 | Memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11126978A JPS5538668A (en) | 1978-09-12 | 1978-09-12 | Memory unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5538668A true JPS5538668A (en) | 1980-03-18 |
Family
ID=14556919
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11126978A Pending JPS5538668A (en) | 1978-09-12 | 1978-09-12 | Memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5538668A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6059462A (en) * | 1983-09-12 | 1985-04-05 | Nec Corp | Pipeline access memory of bi-directional data bus |
JPS60195658A (en) * | 1984-03-16 | 1985-10-04 | Nec Corp | Storage circuit |
JPS6243744A (en) * | 1985-08-21 | 1987-02-25 | Nec Corp | Microcomputer |
-
1978
- 1978-09-12 JP JP11126978A patent/JPS5538668A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6059462A (en) * | 1983-09-12 | 1985-04-05 | Nec Corp | Pipeline access memory of bi-directional data bus |
JPS60195658A (en) * | 1984-03-16 | 1985-10-04 | Nec Corp | Storage circuit |
JPS6243744A (en) * | 1985-08-21 | 1987-02-25 | Nec Corp | Microcomputer |
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