JPS5546628A - Timing phase synchronization system - Google Patents
Timing phase synchronization systemInfo
- Publication number
- JPS5546628A JPS5546628A JP11967778A JP11967778A JPS5546628A JP S5546628 A JPS5546628 A JP S5546628A JP 11967778 A JP11967778 A JP 11967778A JP 11967778 A JP11967778 A JP 11967778A JP S5546628 A JPS5546628 A JP S5546628A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- way
- sampling
- frequency
- sampled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11967778A JPS5546628A (en) | 1978-09-28 | 1978-09-28 | Timing phase synchronization system |
SE7905913A SE440015B (sv) | 1978-07-14 | 1979-07-06 | Tidfasatervinningskrets for mottagare i ett bervagsmodulerat datakommunikationssystem |
GB7923953A GB2026796B (en) | 1978-07-14 | 1979-07-10 | Clock synchronization circuit |
US06/056,641 US4312075A (en) | 1978-07-14 | 1979-07-11 | Timing-phase recovery circuit |
CA331,561A CA1108246A (en) | 1978-07-14 | 1979-07-11 | Timing-phase recovery circuit |
AU48890/79A AU525576B2 (en) | 1978-07-14 | 1979-07-12 | Timing-phase recovery circuit |
ES482447A ES482447A1 (es) | 1978-07-14 | 1979-07-12 | Circuito de recuperacion de la fase de temporizacion. |
FR7918289A FR2431228B1 (fr) | 1978-07-14 | 1979-07-13 | Circuit de recuperation de phase d'horloge |
DE2928446A DE2928446C2 (de) | 1978-07-14 | 1979-07-13 | Schaltungsanordnung zur Synchronisation des Empfängers bei einer trägermodulierten Datenübertragung |
NLAANVRAGE7905478,A NL180063C (nl) | 1978-07-14 | 1979-07-13 | Synchronisatieschakeling. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11967778A JPS5546628A (en) | 1978-09-28 | 1978-09-28 | Timing phase synchronization system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5546628A true JPS5546628A (en) | 1980-04-01 |
JPS573255B2 JPS573255B2 (enrdf_load_stackoverflow) | 1982-01-20 |
Family
ID=14767312
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11967778A Granted JPS5546628A (en) | 1978-07-14 | 1978-09-28 | Timing phase synchronization system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5546628A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5999863A (ja) * | 1982-11-29 | 1984-06-08 | Fuji Xerox Co Ltd | カラ−原稿読取方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61106961U (enrdf_load_stackoverflow) * | 1984-12-17 | 1986-07-07 |
-
1978
- 1978-09-28 JP JP11967778A patent/JPS5546628A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5999863A (ja) * | 1982-11-29 | 1984-06-08 | Fuji Xerox Co Ltd | カラ−原稿読取方法 |
Also Published As
Publication number | Publication date |
---|---|
JPS573255B2 (enrdf_load_stackoverflow) | 1982-01-20 |
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