JPS56160175A - Synchronous signal generator - Google Patents

Synchronous signal generator

Info

Publication number
JPS56160175A
JPS56160175A JP6271680A JP6271680A JPS56160175A JP S56160175 A JPS56160175 A JP S56160175A JP 6271680 A JP6271680 A JP 6271680A JP 6271680 A JP6271680 A JP 6271680A JP S56160175 A JPS56160175 A JP S56160175A
Authority
JP
Japan
Prior art keywords
period
phase
synchronous signal
synchronism
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6271680A
Other languages
Japanese (ja)
Other versions
JPS6114705B2 (en
Inventor
Toshio Oshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6271680A priority Critical patent/JPS56160175A/en
Publication of JPS56160175A publication Critical patent/JPS56160175A/en
Publication of JPS6114705B2 publication Critical patent/JPS6114705B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/06—Generation of synchronising signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To reproduce an input synchronous signal in the form of a stable synchronous signal, by performing a phase synchronism conventionally when the phase difference between the synchronous signals is larger than the reference value based on the sampling period and then inhibiting the phase synchronism when the phase difference is smaller than the reference value respectively. CONSTITUTION:A differentiating circuit 11 differentiates the horizontal synchronous signal SYNC of a synchronous separating circuit 2 and detects the phase changing point. Both a shift register 13 and a NAND circuit 14 provide a period T during which an action of phase synchronism is inhibited. The period T is given by (N+1) TS (sampling period) when the number of stages having no output of the register 13 is referred to as N. In case the phase difference is in the periods other than the period T, a counter 7 of 1/566 division period is not loaded by the signal SYNC of an input. Thus an action of the phase synchronism is inhibited.
JP6271680A 1980-05-14 1980-05-14 Synchronous signal generator Granted JPS56160175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6271680A JPS56160175A (en) 1980-05-14 1980-05-14 Synchronous signal generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6271680A JPS56160175A (en) 1980-05-14 1980-05-14 Synchronous signal generator

Publications (2)

Publication Number Publication Date
JPS56160175A true JPS56160175A (en) 1981-12-09
JPS6114705B2 JPS6114705B2 (en) 1986-04-19

Family

ID=13208332

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6271680A Granted JPS56160175A (en) 1980-05-14 1980-05-14 Synchronous signal generator

Country Status (1)

Country Link
JP (1) JPS56160175A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS628697A (en) * 1985-07-04 1987-01-16 Matsushita Electric Ind Co Ltd Chrominance signal processor
JPS6282774A (en) * 1985-10-07 1987-04-16 Nippon Gakki Seizo Kk Synchronizing circuit
JPH08149332A (en) * 1994-11-25 1996-06-07 Nec Corp Synchronizing regenerator and display system using the regenerator
US6977879B1 (en) 1999-12-20 2005-12-20 Fujitsu Limited Apparatus for adjusting phase of clock signal based on phase error calculated from sampled values of readout signal

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01165367U (en) * 1988-05-12 1989-11-20
JPH0243562U (en) * 1988-09-19 1990-03-26
JPH0243564U (en) * 1988-09-19 1990-03-26

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS628697A (en) * 1985-07-04 1987-01-16 Matsushita Electric Ind Co Ltd Chrominance signal processor
JPS6282774A (en) * 1985-10-07 1987-04-16 Nippon Gakki Seizo Kk Synchronizing circuit
JPH058910B2 (en) * 1985-10-07 1993-02-03 Yamaha Corp
JPH08149332A (en) * 1994-11-25 1996-06-07 Nec Corp Synchronizing regenerator and display system using the regenerator
US6977879B1 (en) 1999-12-20 2005-12-20 Fujitsu Limited Apparatus for adjusting phase of clock signal based on phase error calculated from sampled values of readout signal

Also Published As

Publication number Publication date
JPS6114705B2 (en) 1986-04-19

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