JPS5527655A - Substrate for resin sealed type semiconductor device - Google Patents

Substrate for resin sealed type semiconductor device

Info

Publication number
JPS5527655A
JPS5527655A JP10094178A JP10094178A JPS5527655A JP S5527655 A JPS5527655 A JP S5527655A JP 10094178 A JP10094178 A JP 10094178A JP 10094178 A JP10094178 A JP 10094178A JP S5527655 A JPS5527655 A JP S5527655A
Authority
JP
Japan
Prior art keywords
header
resin sealed
caulking
lead frame
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10094178A
Other languages
English (en)
Other versions
JPS6216550B2 (ja
Inventor
Tomio Yamada
Masayoshi Yoshimura
Hiromichi Suzuki
Susumu Okikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10094178A priority Critical patent/JPS5527655A/ja
Publication of JPS5527655A publication Critical patent/JPS5527655A/ja
Publication of JPS6216550B2 publication Critical patent/JPS6216550B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP10094178A 1978-08-21 1978-08-21 Substrate for resin sealed type semiconductor device Granted JPS5527655A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10094178A JPS5527655A (en) 1978-08-21 1978-08-21 Substrate for resin sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10094178A JPS5527655A (en) 1978-08-21 1978-08-21 Substrate for resin sealed type semiconductor device

Publications (2)

Publication Number Publication Date
JPS5527655A true JPS5527655A (en) 1980-02-27
JPS6216550B2 JPS6216550B2 (ja) 1987-04-13

Family

ID=14287369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10094178A Granted JPS5527655A (en) 1978-08-21 1978-08-21 Substrate for resin sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5527655A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6389259U (ja) * 1986-11-28 1988-06-10

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51113570A (en) * 1975-03-31 1976-10-06 Toshiba Corp Semi-conductor unit
JPS542068A (en) * 1977-06-07 1979-01-09 Mitsubishi Electric Corp Manufacture for semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51113570A (en) * 1975-03-31 1976-10-06 Toshiba Corp Semi-conductor unit
JPS542068A (en) * 1977-06-07 1979-01-09 Mitsubishi Electric Corp Manufacture for semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6389259U (ja) * 1986-11-28 1988-06-10

Also Published As

Publication number Publication date
JPS6216550B2 (ja) 1987-04-13

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