JPS5522893A - Semiconductor integrated circuit device and its manufacturing method - Google Patents

Abstract

PURPOSE: To improve an hFE or an fT by forming a base layer of a lateral transistor by a diffusion process to provide some density inclination and a base layer of a vertical transistor by a vapor growth process.

CONSTITUTION: A p^-epitaxial-layer is vapor-grown in an N-type Si substrate 1 to be covered with an SiO₂ 5. An opening is given to the film 5, a phosphor diffusion is achieved, to provide an N-layer 2 reaching to the substrate in depth and at the surfacial density of 10¹⁶/cm³ and an N⁺ layer 9 with the surfacial density of 10²²/cm³ in the layer 3. In this case, the opening is covered with a thin SiO₂8 and 9. Successively, an opening is given to a SiO₂ 5 and 8 selectively, to form a P⁺ layer 6 and 7 in the layer 2 and 3 by a B-diffusion. At this time, a part of the P⁺ layer 7 is extended to the N-layer 2 to define a base width W of a lateral transistor and make well and ohmic contact in drawing out a collector electrode and the base electrode of the vertical transistor. Successively, an electrode is formed in the layer 4, 6 and 7. According to such a process, the hFE is raised by a diffusion potential in the lateral element and an accelarating field is caused to improve the fT. On the other hand, because the vertical element has a uniform base density, the hFE and fT can be raised compared with a conventional device.

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