JPS5518055A - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
JPS5518055A
JPS5518055A JP9108978A JP9108978A JPS5518055A JP S5518055 A JPS5518055 A JP S5518055A JP 9108978 A JP9108978 A JP 9108978A JP 9108978 A JP9108978 A JP 9108978A JP S5518055 A JPS5518055 A JP S5518055A
Authority
JP
Japan
Prior art keywords
film
layer
mask
etching
coated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9108978A
Other languages
Japanese (ja)
Inventor
Kunio Nakamura
Toshio Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9108978A priority Critical patent/JPS5518055A/en
Publication of JPS5518055A publication Critical patent/JPS5518055A/en
Pending legal-status Critical Current

Links

Landscapes

  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To obtain a gate electrode having equivalent length to the gate length on a photomask in a semiconductor device by side-etching a silicon nitride film at a photoetching step to thereby compensate the reduction in the gate length due to the side-etching of polycrystal silicon.
CONSTITUTION: A field insulating film 2 is formed on a semiconductor substrate 1, and a gate insulating film 3 is coated on the film 2, and a polycrystal silicon layer 4 is coated further on the film 3. A silicon nitride film 5 is further coated on the entire surface of the substrate. Photoresists 6 are formed on the portion except for the portion to become the gate electrode of the layer 4 to thereby etch the film 5 with the photoresists 6 as a mask. In this case, the side etching amount of the film 5 is equal to that of the layer 4. An oxide film 7 is formed with the film 5 as a mask. Then, the film 5 is removed to etch the layer 4 with the film 7 as a mask. In this case, the layer 4 is side-etched. Since the film 7 is formed longer in the amount to be etched as a mask, the layer 4 can be substantially equal in size to the photomask.
COPYRIGHT: (C)1980,JPO&Japio
JP9108978A 1978-07-25 1978-07-25 Method of fabricating semiconductor device Pending JPS5518055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9108978A JPS5518055A (en) 1978-07-25 1978-07-25 Method of fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9108978A JPS5518055A (en) 1978-07-25 1978-07-25 Method of fabricating semiconductor device

Publications (1)

Publication Number Publication Date
JPS5518055A true JPS5518055A (en) 1980-02-07

Family

ID=14016787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9108978A Pending JPS5518055A (en) 1978-07-25 1978-07-25 Method of fabricating semiconductor device

Country Status (1)

Country Link
JP (1) JPS5518055A (en)

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