JPS55162244A - Forming method of metal wiring - Google Patents
Forming method of metal wiringInfo
- Publication number
- JPS55162244A JPS55162244A JP6962679A JP6962679A JPS55162244A JP S55162244 A JPS55162244 A JP S55162244A JP 6962679 A JP6962679 A JP 6962679A JP 6962679 A JP6962679 A JP 6962679A JP S55162244 A JPS55162244 A JP S55162244A
- Authority
- JP
- Japan
- Prior art keywords
- film
- sputtering
- metal wiring
- pressure
- torr
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To make the cross section taper slow when the patternizing is done later by the method wherein the pressure of an inert gas is gradually increased during the evaporation when metal film is evaporated by sputtering which is in contact with the substrate via the contact hole of oxide film coated on a semiconductor substrate. CONSTITUTION:Oxide film 2 is coated on the surface of semiconductor substrate 1, contact hole 2a is cut, and metal film 3, which is to become metal wiring, is formed on the entire surface by sputtering. At this time, the distance between the electrodes of the sputtering device and the power supply are made constant, and the pressure of Ar gas drawn inside is gradually increased. That is, the gas pressure is increased continuously or in steps, several m torr to 30m torr, form the start of sputtering to its completion. By this, the inside and the surface of film 3 assume different properties, and the particles of surface film 3b becom more coarse than those of film 3a in the neighborhood of substrate 1. Consequently, when etching is operated by placing a mask of photoresist film 4 on film 3b, the end part of the metal wiring remaining on hole 2a is made slow.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6962679A JPS55162244A (en) | 1979-06-01 | 1979-06-01 | Forming method of metal wiring |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6962679A JPS55162244A (en) | 1979-06-01 | 1979-06-01 | Forming method of metal wiring |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55162244A true JPS55162244A (en) | 1980-12-17 |
Family
ID=13408255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6962679A Pending JPS55162244A (en) | 1979-06-01 | 1979-06-01 | Forming method of metal wiring |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55162244A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920070A (en) * | 1987-02-19 | 1990-04-24 | Fujitsu Limited | Method for forming wirings for a semiconductor device by filling very narrow via holes |
US6380058B2 (en) | 1998-08-07 | 2002-04-30 | Mitsubishi Denki Kabushiki Kaisha | Method and apparatus for manufacturing semiconductor device |
-
1979
- 1979-06-01 JP JP6962679A patent/JPS55162244A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920070A (en) * | 1987-02-19 | 1990-04-24 | Fujitsu Limited | Method for forming wirings for a semiconductor device by filling very narrow via holes |
US6380058B2 (en) | 1998-08-07 | 2002-04-30 | Mitsubishi Denki Kabushiki Kaisha | Method and apparatus for manufacturing semiconductor device |
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