JPS5720450A - Forming method for pattern of semiconductor device - Google Patents
Forming method for pattern of semiconductor deviceInfo
- Publication number
- JPS5720450A JPS5720450A JP9396980A JP9396980A JPS5720450A JP S5720450 A JPS5720450 A JP S5720450A JP 9396980 A JP9396980 A JP 9396980A JP 9396980 A JP9396980 A JP 9396980A JP S5720450 A JPS5720450 A JP S5720450A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- aluminum
- shape
- multilayer wiring
- wiring structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To prevent the occurrence of shortcircuit and disconnection in a multilayer wiring structure by forming a mask pattern on a material forming the pattern, etching it with reactive ions, and then additionally sputter etching. CONSTITUTION:A resist film 24 of predetermined pattern is formed on an aluminum layer deposited via an SiO2 film on a substrate 21. This wafer 32 is placed on a cathode 31 in the device having parallel planer electrodes 31, 39, the aluminum layer is etched with reactive ions by chlorine gas plasma, and acute aluminum pattern 23 is formed. Subsequently, Ar gas is introduced instead of the chlorine gas to sputter etch it, and the corner of the aluminum pattern is formed in a tapered shape. When the interlayer film and upper layer wire are formed to prepare multilayer wiring structure, the shape of the interlayer film is smoothed by smoothing the shape of the pattern 23, and extremely thin part can be eliminated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9396980A JPS5720450A (en) | 1980-07-11 | 1980-07-11 | Forming method for pattern of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9396980A JPS5720450A (en) | 1980-07-11 | 1980-07-11 | Forming method for pattern of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5720450A true JPS5720450A (en) | 1982-02-02 |
Family
ID=14097223
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9396980A Pending JPS5720450A (en) | 1980-07-11 | 1980-07-11 | Forming method for pattern of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5720450A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4484978A (en) * | 1983-09-23 | 1984-11-27 | Fairchild Camera & Instrument Corp. | Etching method |
US5203957A (en) * | 1991-06-12 | 1993-04-20 | Taiwan Semiconductor Manufacturing Company | Contact sidewall tapering with argon sputtering |
US5411631A (en) * | 1992-11-11 | 1995-05-02 | Tokyo Electron Limited | Dry etching method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5158071A (en) * | 1974-11-18 | 1976-05-21 | Nichiden Varian Kk | SUPATSUTAETSUCHINGUHO |
JPS5313649A (en) * | 1976-07-23 | 1978-02-07 | Kansai Paint Co Ltd | Method of electrodeposition coating |
-
1980
- 1980-07-11 JP JP9396980A patent/JPS5720450A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5158071A (en) * | 1974-11-18 | 1976-05-21 | Nichiden Varian Kk | SUPATSUTAETSUCHINGUHO |
JPS5313649A (en) * | 1976-07-23 | 1978-02-07 | Kansai Paint Co Ltd | Method of electrodeposition coating |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4484978A (en) * | 1983-09-23 | 1984-11-27 | Fairchild Camera & Instrument Corp. | Etching method |
US5203957A (en) * | 1991-06-12 | 1993-04-20 | Taiwan Semiconductor Manufacturing Company | Contact sidewall tapering with argon sputtering |
US5411631A (en) * | 1992-11-11 | 1995-05-02 | Tokyo Electron Limited | Dry etching method |
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