JPS5666038A - Formation of micro-pattern - Google Patents

Formation of micro-pattern

Info

Publication number
JPS5666038A
JPS5666038A JP14255679A JP14255679A JPS5666038A JP S5666038 A JPS5666038 A JP S5666038A JP 14255679 A JP14255679 A JP 14255679A JP 14255679 A JP14255679 A JP 14255679A JP S5666038 A JPS5666038 A JP S5666038A
Authority
JP
Japan
Prior art keywords
micro
pattern
transmuted
layer
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14255679A
Other languages
Japanese (ja)
Inventor
Hirokazu Miyoshi
Kazuo Mizuguchi
Sotohisa Asai
Yoji Masuko
Hirozo Takano
Hiroji Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14255679A priority Critical patent/JPS5666038A/en
Publication of JPS5666038A publication Critical patent/JPS5666038A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/3115Doping the insulating layers
    • H01L21/31155Doping the insulating layers by ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching

Abstract

PURPOSE:To obtain the micro-pattern on a thin film by a method wherein ion beams are injected into the thin film, which is plasmaetched with a locally transmuted film in the surface layer obtained of the thin film as a mask. CONSTITUTION:An Si3N4 film is deposited on an Si substrate, to which 10<16>- 10<18>cm<-3> of 0 ions at more than 50keV are selectively irradiated. If it is annealed at about 500 deg.C, the part into which the ions have been injected becomes a transmuted layer 7 containing a mixture of SiO2 and Si3N4. Then if the surface layer is plasma- etched by CF4 gas with the layer 7 as a mask, the part that has not been transmuted is selectively removed by etching, and the micro-pattern can be obtained. The transmuted layer 7 is removed, if necessary. With this constitution, the micro- pattern can be readily obtained.
JP14255679A 1979-11-01 1979-11-01 Formation of micro-pattern Pending JPS5666038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14255679A JPS5666038A (en) 1979-11-01 1979-11-01 Formation of micro-pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14255679A JPS5666038A (en) 1979-11-01 1979-11-01 Formation of micro-pattern

Publications (1)

Publication Number Publication Date
JPS5666038A true JPS5666038A (en) 1981-06-04

Family

ID=15318079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14255679A Pending JPS5666038A (en) 1979-11-01 1979-11-01 Formation of micro-pattern

Country Status (1)

Country Link
JP (1) JPS5666038A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57208142A (en) * 1981-06-17 1982-12-21 Toshiba Corp Method for forming fine pattern
JPS59227124A (en) * 1983-06-08 1984-12-20 Toshiba Corp Manufacture of semiconductor device
JPS60101932A (en) * 1983-11-08 1985-06-06 Agency Of Ind Science & Technol Formation of pattern
JPH06310491A (en) * 1993-04-27 1994-11-04 Nec Corp Forming method for pattern on solid surface

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461477A (en) * 1977-10-26 1979-05-17 Cho Lsi Gijutsu Kenkyu Kumiai Method of machining by electron beam or ion beam irradiation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461477A (en) * 1977-10-26 1979-05-17 Cho Lsi Gijutsu Kenkyu Kumiai Method of machining by electron beam or ion beam irradiation

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57208142A (en) * 1981-06-17 1982-12-21 Toshiba Corp Method for forming fine pattern
JPS59227124A (en) * 1983-06-08 1984-12-20 Toshiba Corp Manufacture of semiconductor device
JPS60101932A (en) * 1983-11-08 1985-06-06 Agency Of Ind Science & Technol Formation of pattern
JPH06310491A (en) * 1993-04-27 1994-11-04 Nec Corp Forming method for pattern on solid surface

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