JPS55151349A - Forming method of insulation isolating region - Google Patents

Forming method of insulation isolating region

Info

Publication number
JPS55151349A
JPS55151349A JP6013179A JP6013179A JPS55151349A JP S55151349 A JPS55151349 A JP S55151349A JP 6013179 A JP6013179 A JP 6013179A JP 6013179 A JP6013179 A JP 6013179A JP S55151349 A JPS55151349 A JP S55151349A
Authority
JP
Japan
Prior art keywords
region
type
ion
implanted
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6013179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6361777B2 (enExample
Inventor
Masakatsu Yoshida
Yoshihiko Tochio
Atsutomo Toi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP6013179A priority Critical patent/JPS55151349A/ja
Priority to US06/147,715 priority patent/US4295898A/en
Publication of JPS55151349A publication Critical patent/JPS55151349A/ja
Publication of JPS6361777B2 publication Critical patent/JPS6361777B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/918—Light emitting regenerative switching device, e.g. light emitting scr arrays, circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Element Separation (AREA)
JP6013179A 1979-05-15 1979-05-15 Forming method of insulation isolating region Granted JPS55151349A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP6013179A JPS55151349A (en) 1979-05-15 1979-05-15 Forming method of insulation isolating region
US06/147,715 US4295898A (en) 1979-05-15 1980-05-08 Method of making isolated semiconductor devices utilizing ion-implantation of aluminum and heat treating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6013179A JPS55151349A (en) 1979-05-15 1979-05-15 Forming method of insulation isolating region

Publications (2)

Publication Number Publication Date
JPS55151349A true JPS55151349A (en) 1980-11-25
JPS6361777B2 JPS6361777B2 (enExample) 1988-11-30

Family

ID=13133266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6013179A Granted JPS55151349A (en) 1979-05-15 1979-05-15 Forming method of insulation isolating region

Country Status (2)

Country Link
US (1) US4295898A (enExample)
JP (1) JPS55151349A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03159151A (ja) * 1989-11-16 1991-07-09 Sanyo Electric Co Ltd 半導体装置の製造方法
JPH04328846A (ja) * 1991-04-27 1992-11-17 Rohm Co Ltd 半導体装置の製造方法
JPH06196723A (ja) * 1992-04-28 1994-07-15 Mitsubishi Electric Corp 半導体装置及びその製造方法

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4512816A (en) * 1982-02-26 1985-04-23 National Semiconductor Corporation High-density IC isolation technique capacitors
JPS5935425A (ja) * 1982-08-23 1984-02-27 Toshiba Corp 半導体装置の製造方法
JPS5955052A (ja) * 1982-09-24 1984-03-29 Hitachi Ltd 半導体集積回路装置の製造方法
US4662061A (en) * 1985-02-27 1987-05-05 Texas Instruments Incorporated Method for fabricating a CMOS well structure
JPS61256675A (ja) * 1985-05-09 1986-11-14 Sumitomo Electric Ind Ltd シヨツトキゲ−ト電界効果トランジスタの製造方法
US4746964A (en) * 1986-08-28 1988-05-24 Fairchild Semiconductor Corporation Modification of properties of p-type dopants with other p-type dopants
DE3782608D1 (de) * 1986-09-30 1992-12-17 Siemens Ag Verfahren zum erzeugen eines p-dotierten halbleitergebiets in einem n-leitenden halbleiterkoerper.
US4734382A (en) * 1987-02-20 1988-03-29 Fairchild Semiconductor Corporation BiCMOS process having narrow bipolar emitter and implanted aluminum isolation
KR890005885A (ko) * 1987-09-26 1989-05-17 강진구 바이폴라 트랜지스터의 제조방법
US4939099A (en) * 1988-06-21 1990-07-03 Texas Instruments Incorporated Process for fabricating isolated vertical bipolar and JFET transistors
US5141881A (en) * 1989-04-20 1992-08-25 Sanyo Electric Co., Ltd. Method for manufacturing a semiconductor integrated circuit
US6884701B2 (en) * 1991-04-27 2005-04-26 Hidemi Takasu Process for fabricating semiconductor device
US5192712A (en) * 1992-04-15 1993-03-09 National Semiconductor Corporation Control and moderation of aluminum in silicon using germanium and germanium with boron
US5408122A (en) * 1993-12-01 1995-04-18 Eastman Kodak Company Vertical structure to minimize settling times for solid state light detectors
US5559313A (en) * 1994-12-23 1996-09-24 Lucent Technologies Inc. Categorization of purchased items for each transaction by a smart card
US5702957A (en) * 1996-09-20 1997-12-30 Lsi Logic Corporation Method of making buried metallization structure
US7494933B2 (en) * 2006-06-16 2009-02-24 Synopsys, Inc. Method for achieving uniform etch depth using ion implantation and a timed etch

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3930909A (en) * 1966-10-21 1976-01-06 U.S. Philips Corporation Method of manufacturing a semiconductor device utilizing simultaneous outdiffusion during epitaxial growth
US3752715A (en) * 1971-11-15 1973-08-14 Ibm Production of high speed complementary transistors
JPS4879585A (enExample) * 1972-01-24 1973-10-25
US3992232A (en) * 1973-08-06 1976-11-16 Hitachi, Ltd. Method of manufacturing semiconductor device having oxide isolation structure and guard ring
US4128439A (en) * 1977-08-01 1978-12-05 International Business Machines Corporation Method for forming self-aligned field effect device by ion implantation and outdiffusion

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03159151A (ja) * 1989-11-16 1991-07-09 Sanyo Electric Co Ltd 半導体装置の製造方法
JPH04328846A (ja) * 1991-04-27 1992-11-17 Rohm Co Ltd 半導体装置の製造方法
JPH06196723A (ja) * 1992-04-28 1994-07-15 Mitsubishi Electric Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JPS6361777B2 (enExample) 1988-11-30
US4295898A (en) 1981-10-20

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