JPS55146963A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS55146963A
JPS55146963A JP5461979A JP5461979A JPS55146963A JP S55146963 A JPS55146963 A JP S55146963A JP 5461979 A JP5461979 A JP 5461979A JP 5461979 A JP5461979 A JP 5461979A JP S55146963 A JPS55146963 A JP S55146963A
Authority
JP
Japan
Prior art keywords
terminal
gate
overvoltage
integrated circuit
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5461979A
Other languages
Japanese (ja)
Inventor
Takeo Komatsu
Hiroshi Nabeya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5461979A priority Critical patent/JPS55146963A/en
Publication of JPS55146963A publication Critical patent/JPS55146963A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To protect the gate of FET against breakage due to an overvoltage applied to the input terminal, by permitting the overvoltage to bypass by means of a bipolar transistor connected in parallel with a MISFET connected between the input terminal and grounding terminal of a semiconductor integrated circuit. CONSTITUTION:The gate of a MISFET element 2 is connected to an input terminal T, while the drain or the source of the same is connected to a grounding terminal E so that the output is derived from the source or the drain. In this circuit, for protecting the gate of the element 2 against the overvoltage, an npn-transistor 8 is connected in parallel to the element 2. Namely, the emitter of the transistor 8 is connected to the terminal T to which also connected is the base through a resistance 9, while the collector is connected to the terminal E. When a reverse bias is imposed between the base and the collector, a junction capacitance 10 is formed therebetween to provide bypass for the overvoltage applied to the terminal T, thereby to protect the gate of the element 2.
JP5461979A 1979-05-03 1979-05-03 Semiconductor integrated circuit Pending JPS55146963A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5461979A JPS55146963A (en) 1979-05-03 1979-05-03 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5461979A JPS55146963A (en) 1979-05-03 1979-05-03 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS55146963A true JPS55146963A (en) 1980-11-15

Family

ID=12975743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5461979A Pending JPS55146963A (en) 1979-05-03 1979-05-03 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS55146963A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5041889A (en) * 1989-03-16 1991-08-20 Siemens Aktiengesellschaft Monolithically integratable transistor circuit for limiting transient positive high voltages, such as ESD pulses caused by electrostatic discharges on electric conductors
KR100884981B1 (en) 2007-12-28 2009-02-23 주식회사 동부하이텍 Bypass circuit of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5041889A (en) * 1989-03-16 1991-08-20 Siemens Aktiengesellschaft Monolithically integratable transistor circuit for limiting transient positive high voltages, such as ESD pulses caused by electrostatic discharges on electric conductors
KR100884981B1 (en) 2007-12-28 2009-02-23 주식회사 동부하이텍 Bypass circuit of semiconductor device

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