JPS55146978A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS55146978A
JPS55146978A JP5672079A JP5672079A JPS55146978A JP S55146978 A JPS55146978 A JP S55146978A JP 5672079 A JP5672079 A JP 5672079A JP 5672079 A JP5672079 A JP 5672079A JP S55146978 A JPS55146978 A JP S55146978A
Authority
JP
Japan
Prior art keywords
terminal
gate
mis
fet
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5672079A
Other languages
Japanese (ja)
Other versions
JPS6034825B2 (en
Inventor
Takeo Komatsu
Hiroshi Nabeya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP54056720A priority Critical patent/JPS6034825B2/en
Publication of JPS55146978A publication Critical patent/JPS55146978A/en
Publication of JPS6034825B2 publication Critical patent/JPS6034825B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Protection Of Static Devices (AREA)
  • Amplifiers (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the breakdown of the gate of MIS.FET by means of a simple configuration by providing a npn transistor to the MIS.FET, which is connected between the input terminal and the ground terminal, in parallel. CONSTITUTION:The gate to be protected of the MIS.FET 2 is connected to the input terminal T, the drain or source and the substrate of the element 2 are connected to the ground terminal E, and the output is taken from the source or drain. In such a configuration, the npn transistor 8 is used for protecting the gate of the element 2, its emitter is connected to the terminal T through the resistance 19 and its base to the terminal T through the resistance 9. Also the collector is connected to the terminal E, the junction capacitance 10 can be produced between the collector and the base when these are reversely-biased. In this way, since the transistor 8 acts as an element for dropping voltage, the gate of element 2 can be protected from the breakdown to stabilize the operation.
JP54056720A 1979-05-04 1979-05-04 semiconductor integrated circuit Expired JPS6034825B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54056720A JPS6034825B2 (en) 1979-05-04 1979-05-04 semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54056720A JPS6034825B2 (en) 1979-05-04 1979-05-04 semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS55146978A true JPS55146978A (en) 1980-11-15
JPS6034825B2 JPS6034825B2 (en) 1985-08-10

Family

ID=13035317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54056720A Expired JPS6034825B2 (en) 1979-05-04 1979-05-04 semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS6034825B2 (en)

Also Published As

Publication number Publication date
JPS6034825B2 (en) 1985-08-10

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