JPS55146944A - Method of fabricating monolithic integrated microelectronic semiconductor circuit - Google Patents

Method of fabricating monolithic integrated microelectronic semiconductor circuit

Info

Publication number
JPS55146944A
JPS55146944A JP1716780A JP1716780A JPS55146944A JP S55146944 A JPS55146944 A JP S55146944A JP 1716780 A JP1716780 A JP 1716780A JP 1716780 A JP1716780 A JP 1716780A JP S55146944 A JPS55146944 A JP S55146944A
Authority
JP
Japan
Prior art keywords
semiconductor circuit
monolithic integrated
integrated microelectronic
microelectronic semiconductor
fabricating monolithic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1716780A
Other languages
English (en)
Japanese (ja)
Inventor
Ei Kaaran Patoritsuku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPS55146944A publication Critical patent/JPS55146944A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01825—Coupling arrangements, impedance matching circuits
    • H03K19/01831—Coupling arrangements, impedance matching circuits with at least one differential stage
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Logic Circuits (AREA)
JP1716780A 1979-02-15 1980-02-14 Method of fabricating monolithic integrated microelectronic semiconductor circuit Pending JPS55146944A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/012,267 US4325180A (en) 1979-02-15 1979-02-15 Process for monolithic integration of logic, control, and high voltage interface circuitry

Publications (1)

Publication Number Publication Date
JPS55146944A true JPS55146944A (en) 1980-11-15

Family

ID=21754142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1716780A Pending JPS55146944A (en) 1979-02-15 1980-02-14 Method of fabricating monolithic integrated microelectronic semiconductor circuit

Country Status (4)

Country Link
US (1) US4325180A (OSRAM)
JP (1) JPS55146944A (OSRAM)
FR (1) FR2449334A1 (OSRAM)
NL (1) NL189633C (OSRAM)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6058657A (ja) * 1983-09-12 1985-04-04 Hitachi Ltd 半導体集積回路装置
JPS62247558A (ja) * 1986-01-30 1987-10-28 エッセヂエッセ―トムソン　マイクロエレクトロニクス・エッセ・エッレ・エッレ バイポ−ラ−接合トランジスタ−、ｃｍｏｓ及びｄｍｏｓトランジスタ−及び漏れの小さいダイオ−ドを含有するモノリチツクに集積された半導体デバイス、及びその製造方法

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4403395A (en) * 1979-02-15 1983-09-13 Texas Instruments Incorporated Monolithic integration of logic, control and high voltage interface circuitry
JPS55156366A (en) * 1979-05-24 1980-12-05 Toshiba Corp Semiconductor device
US4455566A (en) * 1979-06-18 1984-06-19 Fujitsu Limited Highly integrated semiconductor memory device
JPS567463A (en) * 1979-06-29 1981-01-26 Hitachi Ltd Semiconductor device and its manufacture
US4409725A (en) * 1980-10-16 1983-10-18 Nippon Gakki Seizo Kabushiki Kaisha Method of making semiconductor integrated circuit
DE3174824D1 (en) * 1980-12-17 1986-07-17 Matsushita Electric Ind Co Ltd Semiconductor integrated circuit
NL8104862A (nl) * 1981-10-28 1983-05-16 Philips Nv Halfgeleiderinrichting, en werkwijze ter vervaardiging daarvan.
US4454648A (en) * 1982-03-08 1984-06-19 Mcdonnell Douglas Corporation Method of making integrated MNOS and CMOS devices in a bulk silicon wafer
DE3272436D1 (en) * 1982-05-06 1986-09-11 Itt Ind Gmbh Deutsche Method of making a monolithic integrated circuit with at least one isolated gate field effect transistor and one bipolar transistor
JPH0783252B2 (ja) * 1982-07-12 1995-09-06 株式会社日立製作所 半導体集積回路装置
US5239212A (en) * 1982-07-12 1993-08-24 Hitachi, Ltd. Gate circuit of combined field-effect and bipolar transistors with an improved discharge arrangement
JPS5931052A (ja) * 1982-08-13 1984-02-18 Hitachi Ltd 半導体集積回路装置の製造方法
US4673965A (en) * 1983-02-22 1987-06-16 General Motors Corporation Uses for buried contacts in integrated circuits
US4553318A (en) * 1983-05-02 1985-11-19 Rca Corporation Method of making integrated PNP and NPN bipolar transistors and junction field effect transistor
JPS6080267A (ja) * 1983-10-07 1985-05-08 Toshiba Corp 半導体集積回路装置の製造方法
JPH0695563B2 (ja) * 1985-02-01 1994-11-24 株式会社日立製作所 半導体装置
US5276346A (en) * 1983-12-26 1994-01-04 Hitachi, Ltd. Semiconductor integrated circuit device having protective/output elements and internal circuits
US5610089A (en) * 1983-12-26 1997-03-11 Hitachi, Ltd. Method of fabrication of semiconductor integrated circuit device
DE3474883D1 (en) * 1984-01-16 1988-12-01 Texas Instruments Inc Integrated circuit having bipolar and field effect devices and method of fabrication
FR2571178B1 (fr) * 1984-09-28 1986-11-21 Thomson Csf Structure de circuit integre comportant des transistors cmos a tenue en tension elevee, et son procede de fabrication
US5298462A (en) * 1984-11-30 1994-03-29 Robert Bosch Gmbh Method of making metallization for semiconductor device
JPH0652792B2 (ja) * 1985-02-26 1994-07-06 日産自動車株式会社 半導体装置
US5324982A (en) * 1985-09-25 1994-06-28 Hitachi, Ltd. Semiconductor memory device having bipolar transistor and structure to avoid soft error
US4717678A (en) * 1986-03-07 1988-01-05 International Business Machines Corporation Method of forming self-aligned P contact
IT1188465B (it) * 1986-03-27 1988-01-14 Sgs Microelettronica Spa Rpocedimento per la fabbricazione di circuiti integrati a semiconduttore includenti dispositiv cmos e dispositivi elettronici ad alta tensione
KR890004420B1 (ko) * 1986-11-04 1989-11-03 삼성반도체통신 주식회사 반도체 바이 씨 모오스장치의 제조방법
US4956700A (en) * 1987-08-17 1990-09-11 Siliconix Incorporated Integrated circuit with high power, vertical output transistor capability
US4914051A (en) * 1988-12-09 1990-04-03 Sprague Electric Company Method for making a vertical power DMOS transistor with small signal bipolar transistors
JPH0316123A (ja) * 1989-03-29 1991-01-24 Mitsubishi Electric Corp イオン注入方法およびそれにより製造される半導体装置
US5429959A (en) * 1990-11-23 1995-07-04 Texas Instruments Incorporated Process for simultaneously fabricating a bipolar transistor and a field-effect transistor
US5321283A (en) * 1991-07-30 1994-06-14 Microwave Technology, Inc. High frequency JFET
US5296409A (en) * 1992-05-08 1994-03-22 National Semiconductor Corporation Method of making n-channel and p-channel junction field-effect transistors and CMOS transistors using a CMOS or bipolar/CMOS process
US5374569A (en) * 1992-09-21 1994-12-20 Siliconix Incorporated Method for forming a BiCDMOS
US5618688A (en) * 1994-02-22 1997-04-08 Motorola, Inc. Method of forming a monolithic semiconductor integrated circuit having an N-channel JFET
JP3402400B2 (ja) * 1994-04-22 2003-05-06 株式会社半導体エネルギー研究所 半導体集積回路の作製方法
JPH08172139A (ja) * 1994-12-19 1996-07-02 Sony Corp 半導体装置製造方法
US5985708A (en) * 1996-03-13 1999-11-16 Kabushiki Kaisha Toshiba Method of manufacturing vertical power device
JPH1032274A (ja) * 1996-04-12 1998-02-03 Texas Instr Inc <Ti> Ｃｍｏｓプロセスによるバイポーラートランジスタ作製方法
US5849613A (en) * 1997-10-23 1998-12-15 Chartered Semiconductor Manufacturing Ltd. Method and mask structure for self-aligning ion implanting to form various device structures
US5907168A (en) * 1998-01-23 1999-05-25 Tlc Precision Wafer Technology, Inc. Low noise Ge-JFETs
EP0936674B1 (en) * 1998-02-10 2006-04-26 STMicroelectronics S.r.l. Integrated circuit comprising a VDMOS transistor protected against overvoltages between source and gate
US6117718A (en) * 1999-08-31 2000-09-12 United Microelectronics Corp. Method for forming BJT via formulation of high voltage device in ULSI
JP2002043557A (ja) * 2000-07-21 2002-02-08 Mitsubishi Electric Corp 固体撮像素子を有する半導体装置およびその製造方法
US6818494B1 (en) 2001-03-26 2004-11-16 Hewlett-Packard Development Company, L.P. LDMOS and CMOS integrated circuit and method of making
US6710424B2 (en) 2001-09-21 2004-03-23 Airip RF chipset architecture
US20050250272A1 (en) * 2004-05-03 2005-11-10 Holm-Kennedy James W Biosensor performance enhancement features and designs
US7781843B1 (en) 2007-01-11 2010-08-24 Hewlett-Packard Development Company, L.P. Integrating high-voltage CMOS devices with low-voltage CMOS
KR102138385B1 (ko) 2014-03-06 2020-07-28 매그나칩 반도체 유한회사 저 비용의 반도체 소자 제조방법
FR3045937A1 (fr) * 2015-12-21 2017-06-23 St Microelectronics Crolles 2 Sas Procede de fabrication d'un transistor jfet au sein d'un circuit integre et circuit integre correspondant.
CN107785305A (zh) * 2016-08-31 2018-03-09 无锡华润上华科技有限公司 集成耗尽型结型场效应晶体管的器件

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840814A (OSRAM) * 1971-09-25 1973-06-15
JPS5123432A (OSRAM) * 1974-08-21 1976-02-25 Aikoh Co

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JPS5123432B2 (OSRAM) * 1971-08-26 1976-07-16
US3863330A (en) * 1973-08-02 1975-02-04 Motorola Inc Self-aligned double-diffused MOS devices
US3898107A (en) * 1973-12-03 1975-08-05 Rca Corp Method of making a junction-isolated semiconductor integrated circuit device
US4047217A (en) * 1976-04-12 1977-09-06 Fairchild Camera And Instrument Corporation High-gain, high-voltage transistor for linear integrated circuits
US4068254A (en) * 1976-12-13 1978-01-10 Precision Monolithics, Inc. Integrated FET circuit with input current cancellation
US4120707A (en) * 1977-03-30 1978-10-17 Harris Corporation Process of fabricating junction isolated IGFET and bipolar transistor integrated circuit by diffusion
US4225877A (en) * 1978-09-05 1980-09-30 Sprague Electric Company Integrated circuit with C-Mos logic, and a bipolar driver with polysilicon resistors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840814A (OSRAM) * 1971-09-25 1973-06-15
JPS5123432A (OSRAM) * 1974-08-21 1976-02-25 Aikoh Co

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6058657A (ja) * 1983-09-12 1985-04-04 Hitachi Ltd 半導体集積回路装置
JPS62247558A (ja) * 1986-01-30 1987-10-28 エッセヂエッセ―トムソン　マイクロエレクトロニクス・エッセ・エッレ・エッレ バイポ−ラ−接合トランジスタ−、ｃｍｏｓ及びｄｍｏｓトランジスタ−及び漏れの小さいダイオ−ドを含有するモノリチツクに集積された半導体デバイス、及びその製造方法

Also Published As

Publication number Publication date
NL8000665A (nl) 1980-08-19
NL189633C (nl) 1993-06-01
US4325180A (en) 1982-04-20
FR2449334A1 (fr) 1980-09-12
NL189633B (nl) 1993-01-04
FR2449334B1 (OSRAM) 1984-12-14

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