JPS5787152A - Method of producing semiconductor integrated circuit element - Google Patents

Method of producing semiconductor integrated circuit element

Info

Publication number
JPS5787152A
JPS5787152A JP56113419A JP11341981A JPS5787152A JP S5787152 A JPS5787152 A JP S5787152A JP 56113419 A JP56113419 A JP 56113419A JP 11341981 A JP11341981 A JP 11341981A JP S5787152 A JPS5787152 A JP S5787152A
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
circuit element
producing semiconductor
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56113419A
Other languages
Japanese (ja)
Inventor
Teii Torenarii Deeru
Etsuchi Furederitsuku Aren
Emu Ueruton Robaato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Data General Corp filed Critical Data General Corp
Publication of JPS5787152A publication Critical patent/JPS5787152A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
JP56113419A 1980-07-21 1981-07-20 Method of producing semiconductor integrated circuit element Pending JPS5787152A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US17090780A 1980-07-21 1980-07-21

Publications (1)

Publication Number Publication Date
JPS5787152A true JPS5787152A (en) 1982-05-31

Family

ID=22621766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56113419A Pending JPS5787152A (en) 1980-07-21 1981-07-20 Method of producing semiconductor integrated circuit element

Country Status (4)

Country Link
JP (1) JPS5787152A (en)
DE (1) DE3128621A1 (en)
FR (1) FR2487124B1 (en)
GB (1) GB2081506B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013080893A (en) * 2011-09-21 2013-05-02 Toshiba Corp Semiconductor device

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943545A (en) * 1982-09-06 1984-03-10 Hitachi Ltd Semiconductor ic device and its manufacture
JPH073858B2 (en) * 1984-04-11 1995-01-18 株式会社日立製作所 Method for manufacturing semiconductor device
US4541168A (en) * 1984-10-29 1985-09-17 International Business Machines Corporation Method for making metal contact studs between first level metal and regions of a semiconductor device compatible with polyimide-filled deep trench isolation schemes
JPH10256394A (en) 1997-03-12 1998-09-25 Internatl Business Mach Corp <Ibm> Semiconductor structure and device
KR20010102310A (en) * 1999-12-24 2001-11-15 롤페스 요하네스 게라투스 알베르투스 Method of manufacturing a semiconductor device comprising semiconductor elements formed in a top layer of a silicon wafer situated on a buried insulating layer

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51139281A (en) * 1975-05-28 1976-12-01 Hitachi Ltd Semi-conductor device
JPS5423388A (en) * 1977-07-22 1979-02-21 Hitachi Ltd Semiconductor integrated-circuit device and its manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013080893A (en) * 2011-09-21 2013-05-02 Toshiba Corp Semiconductor device

Also Published As

Publication number Publication date
DE3128621A1 (en) 1982-05-06
FR2487124A1 (en) 1982-01-22
GB2081506A (en) 1982-02-17
FR2487124B1 (en) 1986-01-10
GB2081506B (en) 1984-06-06

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