JPS551142A - Semiconductor with protector - Google Patents

Semiconductor with protector

Info

Publication number
JPS551142A
JPS551142A JP7439378A JP7439378A JPS551142A JP S551142 A JPS551142 A JP S551142A JP 7439378 A JP7439378 A JP 7439378A JP 7439378 A JP7439378 A JP 7439378A JP S551142 A JPS551142 A JP S551142A
Authority
JP
Japan
Prior art keywords
gate
range
type
substrate
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7439378A
Other languages
Japanese (ja)
Other versions
JPS6115593B2 (en
Inventor
Hatsuhide Igarashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7439378A priority Critical patent/JPS551142A/en
Publication of JPS551142A publication Critical patent/JPS551142A/en
Publication of JPS6115593B2 publication Critical patent/JPS6115593B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Protection Of Static Devices (AREA)
  • Amplifiers (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To protect the gate of an input IGFET from abnormal voltage by inserting a gate-earthing type J-FET using a substrate as gate between an input terminal and said input IGFET gate. CONSTITUTION:A P-type well range 8 is formed in an N-type Si substrate 7 by supplying ions for example, and the P<+>-type source range 9 and P<+>-type drain range 10 of an input IGFET device 2 diffusedly in said substrate 7. Next, the P<+>-type drain range 11 and P<+>-type source range 12 of a J-FET device 6 are provided in said range 8, and gate insulating film 13 and field insulating film 14 are fitted on the surfaces of the portion between said ranges 9 and 10 and on the remainder respectively of said substrate 7. Thereafter, the gate electrode 15 of said device 2 is attached to said gate insulatinng film 13, passed through the opening provided on said film 14, and connected to said drain range 11. Further, the source electrode 17 of said device 6 is connected to an input terminal 1. This semiconductor with a protector which is thus constructed is incresed in operational speed and improved in reliability.
JP7439378A 1978-06-19 1978-06-19 Semiconductor with protector Granted JPS551142A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7439378A JPS551142A (en) 1978-06-19 1978-06-19 Semiconductor with protector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7439378A JPS551142A (en) 1978-06-19 1978-06-19 Semiconductor with protector

Publications (2)

Publication Number Publication Date
JPS551142A true JPS551142A (en) 1980-01-07
JPS6115593B2 JPS6115593B2 (en) 1986-04-24

Family

ID=13545886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7439378A Granted JPS551142A (en) 1978-06-19 1978-06-19 Semiconductor with protector

Country Status (1)

Country Link
JP (1) JPS551142A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4489245A (en) * 1980-09-10 1984-12-18 Kabushiki Kaisha Toshiba D.C. Voltage bias circuit in an integrated circuit
JPS6211258A (en) * 1985-07-08 1987-01-20 Nec Corp Gaas semiconductor integrated circuit
US5686751A (en) * 1996-06-28 1997-11-11 Winbond Electronics Corp. Electrostatic discharge protection circuit triggered by capacitive-coupling
JP2012199285A (en) * 2011-03-18 2012-10-18 Fujitsu Semiconductor Ltd Semiconductor element, method of manufacturing semiconductor element, and transistor circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4489245A (en) * 1980-09-10 1984-12-18 Kabushiki Kaisha Toshiba D.C. Voltage bias circuit in an integrated circuit
JPS6211258A (en) * 1985-07-08 1987-01-20 Nec Corp Gaas semiconductor integrated circuit
US5686751A (en) * 1996-06-28 1997-11-11 Winbond Electronics Corp. Electrostatic discharge protection circuit triggered by capacitive-coupling
USRE38222E1 (en) * 1996-06-28 2003-08-19 Winbond Electronics Corp. Electrostatic discharge protection circuit triggered by capacitive-coupling
JP2012199285A (en) * 2011-03-18 2012-10-18 Fujitsu Semiconductor Ltd Semiconductor element, method of manufacturing semiconductor element, and transistor circuit

Also Published As

Publication number Publication date
JPS6115593B2 (en) 1986-04-24

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