JPS548976A - Lsi package - Google Patents
Lsi packageInfo
- Publication number
- JPS548976A JPS548976A JP7463777A JP7463777A JPS548976A JP S548976 A JPS548976 A JP S548976A JP 7463777 A JP7463777 A JP 7463777A JP 7463777 A JP7463777 A JP 7463777A JP S548976 A JPS548976 A JP S548976A
- Authority
- JP
- Japan
- Prior art keywords
- lsi package
- lsi
- package
- fabricate
- heat radiation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
PURPOSE: To fabricate a package which enables high density wiring and high-efficient heat radiation, by connecting a LSI to a ceramic substrate on which a multi-layer circuit has been formed.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7463777A JPS548976A (en) | 1977-06-22 | 1977-06-22 | Lsi package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7463777A JPS548976A (en) | 1977-06-22 | 1977-06-22 | Lsi package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS548976A true JPS548976A (en) | 1979-01-23 |
Family
ID=13552912
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7463777A Pending JPS548976A (en) | 1977-06-22 | 1977-06-22 | Lsi package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS548976A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57126154A (en) * | 1981-01-30 | 1982-08-05 | Nec Corp | Lsi package |
JPS59172387U (en) * | 1983-04-30 | 1984-11-17 | 株式会社島津製作所 | radiation detector |
US4531145A (en) * | 1980-08-04 | 1985-07-23 | Fine Particle Technology Corporation | Method of fabricating complex micro-circuit boards and substrates and substrate |
US4578697A (en) * | 1981-06-15 | 1986-03-25 | Fujitsu Limited | Semiconductor device encapsulating a multi-chip array |
WO1989010014A1 (en) * | 1988-04-06 | 1989-10-19 | Amhet Manufacturing Company, Inc. | An electronic chip connection assembly and method |
US4878846A (en) * | 1988-04-06 | 1989-11-07 | Schroeder Jon M | Electronic circuit chip connection assembly and method |
US5444297A (en) * | 1992-06-17 | 1995-08-22 | Mitsubishi Denki Kabushiki Kaisha | Noise resistant semiconductor power module |
US5477085A (en) * | 1993-11-26 | 1995-12-19 | Nec Corporation | Bonding structure of dielectric substrates for impedance matching circuits on a packaging substrate involved in microwave integrated circuits |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4832475A (en) * | 1971-08-27 | 1973-04-28 | ||
JPS50152668A (en) * | 1974-04-30 | 1975-12-08 | ||
JPS5231672A (en) * | 1975-09-05 | 1977-03-10 | Hitachi Ltd | Ceramic package |
-
1977
- 1977-06-22 JP JP7463777A patent/JPS548976A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4832475A (en) * | 1971-08-27 | 1973-04-28 | ||
JPS50152668A (en) * | 1974-04-30 | 1975-12-08 | ||
JPS5231672A (en) * | 1975-09-05 | 1977-03-10 | Hitachi Ltd | Ceramic package |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4531145A (en) * | 1980-08-04 | 1985-07-23 | Fine Particle Technology Corporation | Method of fabricating complex micro-circuit boards and substrates and substrate |
JPS57126154A (en) * | 1981-01-30 | 1982-08-05 | Nec Corp | Lsi package |
JPS6250981B2 (en) * | 1981-01-30 | 1987-10-28 | Nippon Electric Co | |
US4578697A (en) * | 1981-06-15 | 1986-03-25 | Fujitsu Limited | Semiconductor device encapsulating a multi-chip array |
JPS59172387U (en) * | 1983-04-30 | 1984-11-17 | 株式会社島津製作所 | radiation detector |
WO1989010014A1 (en) * | 1988-04-06 | 1989-10-19 | Amhet Manufacturing Company, Inc. | An electronic chip connection assembly and method |
US4878846A (en) * | 1988-04-06 | 1989-11-07 | Schroeder Jon M | Electronic circuit chip connection assembly and method |
US5444297A (en) * | 1992-06-17 | 1995-08-22 | Mitsubishi Denki Kabushiki Kaisha | Noise resistant semiconductor power module |
US5477085A (en) * | 1993-11-26 | 1995-12-19 | Nec Corporation | Bonding structure of dielectric substrates for impedance matching circuits on a packaging substrate involved in microwave integrated circuits |
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