JPS51142977A - Mounting method of semiconductor elements - Google Patents

Mounting method of semiconductor elements

Info

Publication number
JPS51142977A
JPS51142977A JP50066419A JP6641975A JPS51142977A JP S51142977 A JPS51142977 A JP S51142977A JP 50066419 A JP50066419 A JP 50066419A JP 6641975 A JP6641975 A JP 6641975A JP S51142977 A JPS51142977 A JP S51142977A
Authority
JP
Japan
Prior art keywords
semiconductor elements
mounting method
wiring board
plurarity
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50066419A
Other languages
Japanese (ja)
Other versions
JPS5824940B2 (en
Inventor
Yusaku Nishi
Kazuo Mizuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP50066419A priority Critical patent/JPS5824940B2/en
Publication of JPS51142977A publication Critical patent/JPS51142977A/en
Publication of JPS5824940B2 publication Critical patent/JPS5824940B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE: To simultaneously solder a plurarity of semiconductor elements on a wiring board, with the wiring board and the leads prevented from deterioration due to thermal shock.
COPYRIGHT: (C)1976,JPO&Japio
JP50066419A 1975-06-04 1975-06-04 hand out hand Expired JPS5824940B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50066419A JPS5824940B2 (en) 1975-06-04 1975-06-04 hand out hand

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50066419A JPS5824940B2 (en) 1975-06-04 1975-06-04 hand out hand

Publications (2)

Publication Number Publication Date
JPS51142977A true JPS51142977A (en) 1976-12-08
JPS5824940B2 JPS5824940B2 (en) 1983-05-24

Family

ID=13315245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50066419A Expired JPS5824940B2 (en) 1975-06-04 1975-06-04 hand out hand

Country Status (1)

Country Link
JP (1) JPS5824940B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008536021A (en) * 2005-04-12 2008-09-04 モーレ，コリン，キャンベル，マーシャル Napkin support

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02270238A (en) * 1989-04-10 1990-11-05 Matsushita Electric Ind Co Ltd Relay driver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008536021A (en) * 2005-04-12 2008-09-04 モーレ，コリン，キャンベル，マーシャル Napkin support

Also Published As

Publication number Publication date
JPS5824940B2 (en) 1983-05-24

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