JPS5482168A - Diboinding method for semiconductor chip - Google Patents

Diboinding method for semiconductor chip

Info

Publication number
JPS5482168A
JPS5482168A JP14930477A JP14930477A JPS5482168A JP S5482168 A JPS5482168 A JP S5482168A JP 14930477 A JP14930477 A JP 14930477A JP 14930477 A JP14930477 A JP 14930477A JP S5482168 A JPS5482168 A JP S5482168A
Authority
JP
Japan
Prior art keywords
chip
collect
tray
mark
diboinding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14930477A
Other languages
Japanese (ja)
Inventor
Hiroshi Niikura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14930477A priority Critical patent/JPS5482168A/en
Publication of JPS5482168A publication Critical patent/JPS5482168A/en
Pending legal-status Critical Current

Links

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE: To carry out the linear junction with a high efficiency and with no mistake with an extremely simple operation.
CONSTITUTION: Matching mark 2 of collect 1 is at the constant position θ=0. When chip 3 on the tray tilts by α and is desired to mount on the substrate in the β direction, the collect is turned by α to be opposed to chip 3 and then picked up to be returened to θ=0 with further rotation by -β. Then α-β rotation is given to the collect, and the chip on the tray is picked up to obtain θ=0. And the chip is mounted in an action. The β is generally constant with ±90°, 0° and 180° respectively, Acordingly, mark 2 is turned to make it oppose to chip 3 on the tray, thus securing α for the turning angle of mark 2. In this way, α-β can be obtained and chip 3 can be mounted with fixed direction β. The collet turning direction is selected by the size of α-β to increase the velocity. In such way, a high-efficiency junction can be enusred with no mistake and with the simple operation.
COPYRIGHT: (C)1979,JPO&Japio
JP14930477A 1977-12-14 1977-12-14 Diboinding method for semiconductor chip Pending JPS5482168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14930477A JPS5482168A (en) 1977-12-14 1977-12-14 Diboinding method for semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14930477A JPS5482168A (en) 1977-12-14 1977-12-14 Diboinding method for semiconductor chip

Publications (1)

Publication Number Publication Date
JPS5482168A true JPS5482168A (en) 1979-06-30

Family

ID=15472211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14930477A Pending JPS5482168A (en) 1977-12-14 1977-12-14 Diboinding method for semiconductor chip

Country Status (1)

Country Link
JP (1) JPS5482168A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58145913A (en) * 1982-02-25 1983-08-31 Nec Corp Collet positioning optical system
JPS5990932A (en) * 1982-11-16 1984-05-25 Toshiba Corp Pellet mounting apparatus
JPS5998530A (en) * 1982-11-29 1984-06-06 Toshiba Seiki Kk Method and device for bonding pellet
JPS6082909A (en) * 1983-10-14 1985-05-11 Tokyo Sokuhan Kk Method and device for correcting automatically inclination of die
JPS60158736U (en) * 1984-03-29 1985-10-22 関西日本電気株式会社 semiconductor manufacturing equipment
JPS6396936A (en) * 1986-10-13 1988-04-27 Rohm Co Ltd Reversing mechanism for semiconductor chip
JPS6461033A (en) * 1987-09-01 1989-03-08 Sumitomo Electric Industries Device for mounting chip
US6902789B2 (en) 2000-08-31 2005-06-07 Ohno Co. Ltd. Tufted carpet and backing fabric

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51131274A (en) * 1975-05-10 1976-11-15 Fujitsu Ltd Tip bonding method
JPS5275639A (en) * 1975-12-19 1977-06-24 Matsushita Electronics Corp Brazing method and device thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51131274A (en) * 1975-05-10 1976-11-15 Fujitsu Ltd Tip bonding method
JPS5275639A (en) * 1975-12-19 1977-06-24 Matsushita Electronics Corp Brazing method and device thereof

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58145913A (en) * 1982-02-25 1983-08-31 Nec Corp Collet positioning optical system
JPS5990932A (en) * 1982-11-16 1984-05-25 Toshiba Corp Pellet mounting apparatus
JPS5998530A (en) * 1982-11-29 1984-06-06 Toshiba Seiki Kk Method and device for bonding pellet
JPH0324783B2 (en) * 1982-11-29 1991-04-04 Toshiba Seiki Kk
JPS6082909A (en) * 1983-10-14 1985-05-11 Tokyo Sokuhan Kk Method and device for correcting automatically inclination of die
JPS60158736U (en) * 1984-03-29 1985-10-22 関西日本電気株式会社 semiconductor manufacturing equipment
JPS6396936A (en) * 1986-10-13 1988-04-27 Rohm Co Ltd Reversing mechanism for semiconductor chip
JP2646082B2 (en) * 1986-10-13 1997-08-25 ロ−ム株式会社 Semiconductor chip pickup device
JPS6461033A (en) * 1987-09-01 1989-03-08 Sumitomo Electric Industries Device for mounting chip
US6902789B2 (en) 2000-08-31 2005-06-07 Ohno Co. Ltd. Tufted carpet and backing fabric

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