JPS5428572A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5428572A
JPS5428572A JP9376877A JP9376877A JPS5428572A JP S5428572 A JPS5428572 A JP S5428572A JP 9376877 A JP9376877 A JP 9376877A JP 9376877 A JP9376877 A JP 9376877A JP S5428572 A JPS5428572 A JP S5428572A
Authority
JP
Japan
Prior art keywords
manufacture
semiconductor device
secure
substrate
mask aligner
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9376877A
Other languages
Japanese (ja)
Inventor
Yutaka Otowa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9376877A priority Critical patent/JPS5428572A/en
Publication of JPS5428572A publication Critical patent/JPS5428572A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To secure an easy pattern positioning on the both surfaces of the substrate without using the mask aligner.
JP9376877A 1977-08-05 1977-08-05 Manufacture of semiconductor device Pending JPS5428572A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9376877A JPS5428572A (en) 1977-08-05 1977-08-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9376877A JPS5428572A (en) 1977-08-05 1977-08-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5428572A true JPS5428572A (en) 1979-03-03

Family

ID=14091598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9376877A Pending JPS5428572A (en) 1977-08-05 1977-08-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5428572A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2686735A1 (en) * 1992-01-23 1993-07-30 Mitsubishi Electric Corp PROCESS FOR PRODUCING SEMICONDUCTOR PELLETS

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2686735A1 (en) * 1992-01-23 1993-07-30 Mitsubishi Electric Corp PROCESS FOR PRODUCING SEMICONDUCTOR PELLETS

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