JPS5418673A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

Info

Publication number
JPS5418673A
JPS5418673A JP8386177A JP8386177A JPS5418673A JP S5418673 A JPS5418673 A JP S5418673A JP 8386177 A JP8386177 A JP 8386177A JP 8386177 A JP8386177 A JP 8386177A JP S5418673 A JPS5418673 A JP S5418673A
Authority
JP
Japan
Prior art keywords
manufacture
semiconductor device
substrate
vamp
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8386177A
Other languages
Japanese (ja)
Other versions
JPS5937857B2 (en
Inventor
Hiroyasu Karimoto
Kazutoshi Nagano
Kosei Kajiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8386177A priority Critical patent/JPS5937857B2/en
Publication of JPS5418673A publication Critical patent/JPS5418673A/en
Publication of JPS5937857B2 publication Critical patent/JPS5937857B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To avoid the occurrence of the electric short circuit when the vamp is connected to the lead wire, by forming a deep insulating film region at one end of the substrate simultaneously with formation of the vamp which touches the active/passive element provided within the substrate with installation of an opening to the insulating film formed on the semiconductor substrate.
COPYRIGHT: (C)1979,JPO&Japio
JP8386177A 1977-07-12 1977-07-12 Manufacturing method of semiconductor device Expired JPS5937857B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8386177A JPS5937857B2 (en) 1977-07-12 1977-07-12 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8386177A JPS5937857B2 (en) 1977-07-12 1977-07-12 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5418673A true JPS5418673A (en) 1979-02-10
JPS5937857B2 JPS5937857B2 (en) 1984-09-12

Family

ID=13814450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8386177A Expired JPS5937857B2 (en) 1977-07-12 1977-07-12 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5937857B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63160715A (en) * 1986-12-23 1988-07-04 Kawasaki Steel Corp Guiding device for edger mill

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63160715A (en) * 1986-12-23 1988-07-04 Kawasaki Steel Corp Guiding device for edger mill

Also Published As

Publication number Publication date
JPS5937857B2 (en) 1984-09-12

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