JPS54153582A - Manufacture for semiconductor device - Google Patents

Manufacture for semiconductor device

Info

Publication number
JPS54153582A
JPS54153582A JP6161278A JP6161278A JPS54153582A JP S54153582 A JPS54153582 A JP S54153582A JP 6161278 A JP6161278 A JP 6161278A JP 6161278 A JP6161278 A JP 6161278A JP S54153582 A JPS54153582 A JP S54153582A
Authority
JP
Japan
Prior art keywords
layer
resist
exposed
sio
sin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6161278A
Other languages
Japanese (ja)
Other versions
JPS5816619B2 (en
Inventor
Tai Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP53061612A priority Critical patent/JPS5816619B2/en
Publication of JPS54153582A publication Critical patent/JPS54153582A/en
Publication of JPS5816619B2 publication Critical patent/JPS5816619B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE: To establish the semiconductor device in which the inversion of the part along the semiconductor element boundary is avoided and the reduction in the effective semiconductor element width is less.
CONSTITUTION: On the transmissive substrate 3, the P type single crystal Si layer 4, buffer SiO2 layer 5, SiN layer 6, and buffer SiO2 layer 7 are formed in lamination, and the resist is coated and the mask 8 is formed on the SiO2 layer 7 (Fig. a). Further, the SiO2 layer 7, SiN layer 6 and SiO2 layer 5 are respectively etched and a part of the Si layer 4 is exposed (Fig. b). After etching the Si layer 4, the exposed Si layer 4 is thermally oxided to grow the field oxide insulation layer 9 (Fig. c). Further, the SiN layer 6 is removed (Fig. d) and the positive type resist 10 is coated on the surface of the Si layer 4 and the insulation layer 9 (Fig. e). The resist 10 is exposed from the lower side of the substrate 3. In this case, only the resist 10 on the insulation layer 9 is exposed. Further, the exposed resist 10 is removed (Fig. f) and the P type impurity is injected from the upper side, allowing to inject the P type impurity on the insulation layer 9 not covered with the resist 10 and the Si layer 4 around it.
COPYRIGHT: (C)1979,JPO&Japio
JP53061612A 1978-05-25 1978-05-25 Manufacturing method of semiconductor device Expired JPS5816619B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53061612A JPS5816619B2 (en) 1978-05-25 1978-05-25 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53061612A JPS5816619B2 (en) 1978-05-25 1978-05-25 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS54153582A true JPS54153582A (en) 1979-12-03
JPS5816619B2 JPS5816619B2 (en) 1983-04-01

Family

ID=13176155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53061612A Expired JPS5816619B2 (en) 1978-05-25 1978-05-25 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5816619B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196579A (en) * 1981-05-28 1982-12-02 Nec Corp Sos/mos transistor and manufacture thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196579A (en) * 1981-05-28 1982-12-02 Nec Corp Sos/mos transistor and manufacture thereof
JPH0514430B2 (en) * 1981-05-28 1993-02-25 Nippon Electric Co

Also Published As

Publication number Publication date
JPS5816619B2 (en) 1983-04-01

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