JPS54144853A - Variable delay circuit - Google Patents
Variable delay circuitInfo
- Publication number
- JPS54144853A JPS54144853A JP5352178A JP5352178A JPS54144853A JP S54144853 A JPS54144853 A JP S54144853A JP 5352178 A JP5352178 A JP 5352178A JP 5352178 A JP5352178 A JP 5352178A JP S54144853 A JPS54144853 A JP S54144853A
- Authority
- JP
- Japan
- Prior art keywords
- delay
- circuit
- circuits
- selection circuit
- selection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/30—Time-delay networks
- H03H7/32—Time-delay networks with lumped inductance and capacitance
- H03H7/325—Adjustable networks
Landscapes
- Pulse Circuits (AREA)
Abstract
PURPOSE:To obtain the variable delay circuit in which the maximum operation possible frequency is independent of the range of delay bit number, by cascade connection of fundamental constituent circuits consisting of the common connection of the first and second delay circuits for the input side and the connection of the selection circuits for the output side. CONSTITUTION:The fundamental circuit is constituted with the common connection of the input of the shift register SR2 of the first delay circuit and SR16 of the second delay circuit, and the connection of the output to one input of the selection circuit 7 respectively. Similarly, the fundamental circuits constituted with Sr17, 4 and SR5, 18 and SR6, 19 and the selection circuits 8, 9, 10 are cascade-connected. Each selection circuit is controlled with the control signals 12 to 15 and SR is controlled with the closk signal from the terminal 11. The delay time of the selection circuit is the sum of the time tpd1 from the output of SR to the selection circuit and the time tpd2 from the output to the next SR, and it is constant. This is independently of the combination of the control signals 12 to 15, one selection circuit is in the flow of one signal, and the delay time of the selection circuit is not added. Accordingly, the number of maximum operation possible frequency is independent of the range of delay bit to ensure the high speed operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5352178A JPS54144853A (en) | 1978-05-04 | 1978-05-04 | Variable delay circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5352178A JPS54144853A (en) | 1978-05-04 | 1978-05-04 | Variable delay circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54144853A true JPS54144853A (en) | 1979-11-12 |
JPH0214813B2 JPH0214813B2 (en) | 1990-04-10 |
Family
ID=12945119
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5352178A Granted JPS54144853A (en) | 1978-05-04 | 1978-05-04 | Variable delay circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54144853A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61201513A (en) * | 1985-03-04 | 1986-09-06 | Matsushita Electric Ind Co Ltd | Waveform equalizer |
JPH02211714A (en) * | 1989-02-10 | 1990-08-23 | Nec Corp | Variable delay circuit |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7149420B2 (en) * | 2019-06-24 | 2022-10-06 | 本田技研工業株式会社 | Information provision system and information provision method |
US11947643B2 (en) | 2019-12-26 | 2024-04-02 | Rakuten Group, Inc. | Fraud detection system, fraud detection method, and program |
-
1978
- 1978-05-04 JP JP5352178A patent/JPS54144853A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61201513A (en) * | 1985-03-04 | 1986-09-06 | Matsushita Electric Ind Co Ltd | Waveform equalizer |
JPH0325087B2 (en) * | 1985-03-04 | 1991-04-05 | Matsushita Electric Ind Co Ltd | |
JPH02211714A (en) * | 1989-02-10 | 1990-08-23 | Nec Corp | Variable delay circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0214813B2 (en) | 1990-04-10 |
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