JPS54111760A - Electrode construction for semiconductor device - Google Patents

Electrode construction for semiconductor device

Info

Publication number
JPS54111760A
JPS54111760A JP1843678A JP1843678A JPS54111760A JP S54111760 A JPS54111760 A JP S54111760A JP 1843678 A JP1843678 A JP 1843678A JP 1843678 A JP1843678 A JP 1843678A JP S54111760 A JPS54111760 A JP S54111760A
Authority
JP
Japan
Prior art keywords
film
psg
constitution
extension
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1843678A
Other languages
Japanese (ja)
Inventor
Akihiro Tomosawa
Shozo Hosoda
Tatsu Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1843678A priority Critical patent/JPS54111760A/en
Publication of JPS54111760A publication Critical patent/JPS54111760A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To block the extension of the crack toward external side due to bonding pressure, by forming the steps corresponding to the protective film through the provision of the steps to the ground insulation film surrounding the region beneath the bump electrodes.
CONSTITUTION: The part 12A corresponding to the electrode forming position of the oxide film 12 on the Si substrate 10 is separated with the groove M, and the step is formed corresponding to the groove M covered with PSG 16. Al pad is formed on the PSG 16 and it is coated with PSG 20, then the step ST is formed corresponding to the step of the lower layer. Opening is made to PSG 20 and the impurity film 22 is formed by sequentially evaporating Cr, Ni-Cr, and Pd, and it is duplicated partly on the partial film 20 wider than the film 18. Next, the Au bump electrode 24 is formed. With the constitution, since the step ST blocks the extension of the crack due to bonding pressure, the moisture proof and the reliability as whole device can not almost be lost.
COPYRIGHT: (C)1979,JPO&Japio
JP1843678A 1978-02-22 1978-02-22 Electrode construction for semiconductor device Pending JPS54111760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1843678A JPS54111760A (en) 1978-02-22 1978-02-22 Electrode construction for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1843678A JPS54111760A (en) 1978-02-22 1978-02-22 Electrode construction for semiconductor device

Publications (1)

Publication Number Publication Date
JPS54111760A true JPS54111760A (en) 1979-09-01

Family

ID=11971587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1843678A Pending JPS54111760A (en) 1978-02-22 1978-02-22 Electrode construction for semiconductor device

Country Status (1)

Country Link
JP (1) JPS54111760A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5455195A (en) * 1994-05-06 1995-10-03 Texas Instruments Incorporated Method for obtaining metallurgical stability in integrated circuit conductive bonds
JP2006269971A (en) * 2005-03-25 2006-10-05 Mitsumi Electric Co Ltd Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5455195A (en) * 1994-05-06 1995-10-03 Texas Instruments Incorporated Method for obtaining metallurgical stability in integrated circuit conductive bonds
JP2006269971A (en) * 2005-03-25 2006-10-05 Mitsumi Electric Co Ltd Semiconductor device

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